Pamela S. Gillis

Person

Jericho, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dense register array for enabling scan out observation of both L1 a...
- Patent number 8,423,844
- Issue date Apr 16, 2013
- International Business Machines Corporation
- Pamela S. Gillis
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for increased effectiveness of delay and trans...
- Patent number 8,381,050
- Issue date Feb 19, 2013
- International Business Machines Corporation
- Pamela S. Gillis
- G01 - MEASURING TESTING
Information Patent Grant
Method to test hold path faults using functional clocking
- Patent number 8,230,283
- Issue date Jul 24, 2012
- International Business Machines Corporation
- Pamela S. Gillis
- G01 - MEASURING TESTING
Information Patent Grant
Hold transition fault model and test generation method
- Patent number 8,181,135
- Issue date May 15, 2012
- International Business Machines Corporation
- Vikram Iyengar
- G01 - MEASURING TESTING
Information Patent Grant
Partial good integrated circuit and method of testing same
- Patent number 7,478,301
- Issue date Jan 13, 2009
- International Business Machines Corporation
- Leonard O. Farnsworth, III
- G11 - INFORMATION STORAGE
Information Patent Grant
Partial good integrated circuit and method of testing same
- Patent number 7,305,600
- Issue date Dec 4, 2007
- International Business Machines Corporation
- Leonard O. Farnsworth, III
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit using boundary scan cells for design library ana...
- Patent number 7,281,182
- Issue date Oct 9, 2007
- International Business Machines Corporation
- Pamela S. Gillis
- G01 - MEASURING TESTING
Information Patent Grant
Parametric testing for high pin count ASIC
- Patent number 7,010,733
- Issue date Mar 7, 2006
- International Business Machines Corporation
- Robert W. Bassett
- G01 - MEASURING TESTING
Information Patent Grant
Method of electrically blowing fuses under control of an on-chip te...
- Patent number 6,768,694
- Issue date Jul 27, 2004
- International Business Machines Corporation
- Darren L. Anand
- G11 - INFORMATION STORAGE
Information Patent Grant
Self test method and device for dynamic voltage screen functionalit...
- Patent number 6,656,751
- Issue date Dec 2, 2003
- International Business Machines Corporation
- John E. Andersen
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for initializing an integrated circuit using c...
- Patent number 6,577,156
- Issue date Jun 10, 2003
- International Business Machines Corporation
- Darren L. Anand
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-timed AC CIO wrap method and apparatus
- Patent number 6,058,496
- Issue date May 2, 2000
- International Business Machines Corporation
- Pamela Sue Gillis
- G01 - MEASURING TESTING
Information Patent Grant
Scan-bypass architecture without additional external latches
- Patent number 5,925,143
- Issue date Jul 20, 1999
- International Business Machines Corporation
- Pamela Sue Gillis
- G11 - INFORMATION STORAGE
Information Patent Grant
Scan-bypass architecture without additional external latches
- Patent number 5,719,879
- Issue date Feb 17, 1998
- International Business Machines Corporation
- Pamela Sue Gillis
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit driver inhibit control test method
- Patent number 5,127,008
- Issue date Jun 30, 1992
- International Business Machines Corporation
- Robert W. Bassett
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DENSE REGISTER ARRAY FOR ENABLING SCAN OUT OBSERVATION OF BOTH L1 A...
- Publication number 20120179944
- Publication date Jul 12, 2012
- International Business Machines Corporation
- Pamela S. Gillis
- G01 - MEASURING TESTING
Information Patent Application
METHOD TO TEST HOLD PATH FAULTS USING FUNCTIONAL CLOCKING
- Publication number 20110154141
- Publication date Jun 23, 2011
- International Business Machines Corporation
- Pamela S. Gillis
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR INCREASED EFFECTIVENESS OF DELAY AND TRANS...
- Publication number 20110121838
- Publication date May 26, 2011
- International Business Machines Corporation
- Pamela S. Gillis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hold Transition Fault Model and Test Generation Method
- Publication number 20110055650
- Publication date Mar 3, 2011
- International Business Machines Corporation
- Vikram Iyengar
- G01 - MEASURING TESTING
Information Patent Application
PARTIAL GOOD INTEGRATED CIRCUIT AND METHOD OF TESTING SAME
- Publication number 20080209289
- Publication date Aug 28, 2008
- Leonard O. Farnsworth
- G01 - MEASURING TESTING
Information Patent Application
PARTIAL GOOD INTEGRATED CIRCUIT AND METHOD OF TESTING SAME
- Publication number 20080010571
- Publication date Jan 10, 2008
- Leonard O. Farnsworth
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND CIRCUIT USING BOUNDARY SCAN CELLS FOR DESIGN LIBRARY ANA...
- Publication number 20060190784
- Publication date Aug 24, 2006
- International Business Machines Corporation
- Pamela S. Gillis
- G01 - MEASURING TESTING
Information Patent Application
Partial good integrated circuit and method of testing same
- Publication number 20050047224
- Publication date Mar 3, 2005
- International Business Machines Corporation
- Leonard O. Farnsworth
- G01 - MEASURING TESTING
Information Patent Application
Parametric testing for high pin count ASIC
- Publication number 20040073856
- Publication date Apr 15, 2004
- International Business Machines Corporation
- Robert W. Bassett
- G01 - MEASURING TESTING
Information Patent Application
METHOD OF ELECTRICALLY BLOWING FUSES UNDER CONTROL OF AN ON-CHIP TE...
- Publication number 20040066695
- Publication date Apr 8, 2004
- International Business Machines Corporation
- Darren L. Anand
- G11 - INFORMATION STORAGE
Information Patent Application
Self test method and device for dynamic voltage screen functionalit...
- Publication number 20030090295
- Publication date May 15, 2003
- John E. Andersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and apparatus for initializing an integrated circuit using c...
- Publication number 20020101777
- Publication date Aug 1, 2002
- International Business Machines Corporation
- Darren L. Anand
- G11 - INFORMATION STORAGE

Pamela S. Gillis

Person

Patents Grantslast 30 patents

Dense register array for enabling scan out observation of both L1 a...

Method and apparatus for increased effectiveness of delay and trans...

Method to test hold path faults using functional clocking

Hold transition fault model and test generation method

Partial good integrated circuit and method of testing same

Partial good integrated circuit and method of testing same

Method and circuit using boundary scan cells for design library ana...

Parametric testing for high pin count ASIC

Method of electrically blowing fuses under control of an on-chip te...

Self test method and device for dynamic voltage screen functionalit...

Method and apparatus for initializing an integrated circuit using c...

Self-timed AC CIO wrap method and apparatus

Scan-bypass architecture without additional external latches

Scan-bypass architecture without additional external latches

Integrated circuit driver inhibit control test method

Patents Applicationslast 30 patents

DENSE REGISTER ARRAY FOR ENABLING SCAN OUT OBSERVATION OF BOTH L1 A...

METHOD TO TEST HOLD PATH FAULTS USING FUNCTIONAL CLOCKING

METHOD AND APPARATUS FOR INCREASED EFFECTIVENESS OF DELAY AND TRANS...

Hold Transition Fault Model and Test Generation Method

PARTIAL GOOD INTEGRATED CIRCUIT AND METHOD OF TESTING SAME

PARTIAL GOOD INTEGRATED CIRCUIT AND METHOD OF TESTING SAME

METHOD AND CIRCUIT USING BOUNDARY SCAN CELLS FOR DESIGN LIBRARY ANA...

Partial good integrated circuit and method of testing same

Parametric testing for high pin count ASIC

METHOD OF ELECTRICALLY BLOWING FUSES UNDER CONTROL OF AN ON-CHIP TE...

Self test method and device for dynamic voltage screen functionalit...

Method and apparatus for initializing an integrated circuit using c...