Para Segaram

Person

Wahroonga, AU

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-surface IC packaging structures
- Patent number 8,598,696
- Issue date Dec 3, 2013
- Samsung Electronics Co., Ltd.
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Connector having a housing with a conductor with a ramp section and...
- Patent number 8,313,333
- Issue date Nov 20, 2012
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical connector with conductors with a ramp to induce torsion
- Patent number 8,079,848
- Issue date Dec 20, 2011
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High speed, direct path, stair-step, electronic connectors with imp...
- Patent number 8,047,855
- Issue date Nov 1, 2011
- Samsung Electronics Co., Ltd.
- Gary Yasamura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Tapered dielectric and conductor structures and applications thereof
- Patent number 7,973,391
- Issue date Jul 5, 2011
- Samsung Electronics Co., Ltd.
- Joseph C. Fjelstad
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multi-surface IC packaging structures and methods for their manufac...
- Patent number 7,919,355
- Issue date Apr 5, 2011
- Samsung Electronics Co., Ltd.
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Torsionally-induced contact-force conductors for electrical connect...
- Patent number 7,909,615
- Issue date Mar 22, 2011
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Torsionally-induced contact-force conductors for electrical connect...
- Patent number 7,845,986
- Issue date Dec 7, 2010
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-surface IC packaging structures and methods for their manufac...
- Patent number 7,737,545
- Issue date Jun 15, 2010
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-surface contact IC packaging structures and assemblies
- Patent number 7,732,904
- Issue date Jun 8, 2010
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect system without through-holes
- Patent number 7,652,381
- Issue date Jan 26, 2010
- Interconnect Portfolio LLC
- Kevin P. Grundy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
High speed, direct path, stair-step, electronic connectors with imp...
- Patent number 7,651,336
- Issue date Jan 26, 2010
- Interconnect Portfolio LLC
- Gary Yasumura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Signal-segregating connector system
- Patent number 7,613,011
- Issue date Nov 3, 2009
- Interconnect Portfolio LLC
- Kevin P. Grundy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Tapered dielectric and conductor structures and applications thereof
- Patent number 7,388,279
- Issue date Jun 17, 2008
- Interconnect Portfolio, LLC
- Joseph C. Fjelstad
- G01 - MEASURING TESTING
Information Patent Grant
Partitioned integrated circuit package with central clock driver
- Patent number 7,279,783
- Issue date Oct 9, 2007
- Silicon Pipe, Inc.
- Joseph C Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High speed, direct path, stair-step, electronic connectors with imp...
- Patent number 7,278,855
- Issue date Oct 9, 2007
- Silicon Pipe, Inc.
- Gary Yasumura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Refinement of a search query based on information stored on a local...
- Patent number 7,240,052
- Issue date Jul 3, 2007
- IAC Search & Media, Inc.
- Jeffrey Alan Joseph Sidlosky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal-segregating connector system
- Patent number 7,227,759
- Issue date Jun 5, 2007
- Silicon Pipe, Inc.
- Kevin P. Grundy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multi-surface IC packaging structures and methods for their manufac...
- Patent number 7,061,096
- Issue date Jun 13, 2006
- Silicon Pipe, Inc.
- Joseph C Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Torsionally-Induced Contact-Force Conductors for Electrical Connect...
- Publication number 20120149250
- Publication date Jun 14, 2012
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-SURFACE IC PACKAGING STRUCTURES
- Publication number 20110215475
- Publication date Sep 8, 2011
- Interconnect Portfollo LLC
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Torsionally-Induced Contact-Force Conductors for Electrical Connect...
- Publication number 20110171857
- Publication date Jul 14, 2011
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Torsionally-Induced Contact-Force Conductors for Electrical Connect...
- Publication number 20110065332
- Publication date Mar 17, 2011
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-Surface IC Packaging Structures and Methods for their Manufac...
- Publication number 20100221871
- Publication date Sep 2, 2010
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High Speed, Direct Path, Stair-Step, Electronic Connectors with Imp...
- Publication number 20100151704
- Publication date Jun 17, 2010
- Interconnect Portfolio LLC
- Gary Yasumura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Interconnect System without Through-Holes
- Publication number 20100127402
- Publication date May 27, 2010
- Interconnect Portfolio LLC
- Kevin P. Grundy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Partitioned Integrated Circuit Package with Central Clock Driver
- Publication number 20090091017
- Publication date Apr 9, 2009
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High Speed, Direct Path, Stair-Step, Electronic Connectors with Imp...
- Publication number 20090093173
- Publication date Apr 9, 2009
- Gary Yasumura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
TAPERED DIELECTRIC AND CONDUCTOR STRUCTURES AND APPLICATIONS THEREOF
- Publication number 20090027137
- Publication date Jan 29, 2009
- Joseph C. Fjelstad
- G01 - MEASURING TESTING
Information Patent Application
Signal-Segregating Connector System
- Publication number 20070236901
- Publication date Oct 11, 2007
- Kevin P. Grundy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Multi-surface IC packaging structures and methods for their manufac...
- Publication number 20060157846
- Publication date Jul 20, 2006
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Torsionally-induced contact-force conductors for electrical connect...
- Publication number 20060035482
- Publication date Feb 16, 2006
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Signal-segregating connector system
- Publication number 20060034061
- Publication date Feb 16, 2006
- Kevin P. Grundy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Interconnect system without through-holes
- Publication number 20050189640
- Publication date Sep 1, 2005
- Kevin P. Grundy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Tapered dielectric and conductor structures and applications thereof
- Publication number 20050133922
- Publication date Jun 23, 2005
- Joseph C. Fjelstad
- G01 - MEASURING TESTING
Information Patent Application
Multi-surface contact IC packaging structures and assemblies
- Publication number 20050093152
- Publication date May 5, 2005
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-surface IC packaging structures and methods for their manufac...
- Publication number 20050093127
- Publication date May 5, 2005
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Refinement of a search query based on information stored on a local...
- Publication number 20050091205
- Publication date Apr 28, 2005
- Jeffrey Alan Joseph Sidlosky
- G06 - COMPUTING CALCULATING COUNTING

Para Segaram

Person

Patents Grantslast 30 patents

Multi-surface IC packaging structures

Connector having a housing with a conductor with a ramp section and...

Electrical connector with conductors with a ramp to induce torsion

High speed, direct path, stair-step, electronic connectors with imp...

Tapered dielectric and conductor structures and applications thereof

Multi-surface IC packaging structures and methods for their manufac...

Torsionally-induced contact-force conductors for electrical connect...

Torsionally-induced contact-force conductors for electrical connect...

Multi-surface IC packaging structures and methods for their manufac...

Multi-surface contact IC packaging structures and assemblies

Interconnect system without through-holes

High speed, direct path, stair-step, electronic connectors with imp...

Signal-segregating connector system

Tapered dielectric and conductor structures and applications thereof

Partitioned integrated circuit package with central clock driver

High speed, direct path, stair-step, electronic connectors with imp...

Refinement of a search query based on information stored on a local...

Signal-segregating connector system

Multi-surface IC packaging structures and methods for their manufac...

Patents Applicationslast 30 patents

Torsionally-Induced Contact-Force Conductors for Electrical Connect...

MULTI-SURFACE IC PACKAGING STRUCTURES

Torsionally-Induced Contact-Force Conductors for Electrical Connect...

Torsionally-Induced Contact-Force Conductors for Electrical Connect...

Multi-Surface IC Packaging Structures and Methods for their Manufac...

High Speed, Direct Path, Stair-Step, Electronic Connectors with Imp...

Interconnect System without Through-Holes

Partitioned Integrated Circuit Package with Central Clock Driver

High Speed, Direct Path, Stair-Step, Electronic Connectors with Imp...

TAPERED DIELECTRIC AND CONDUCTOR STRUCTURES AND APPLICATIONS THEREOF

Signal-Segregating Connector System

Multi-surface IC packaging structures and methods for their manufac...

Torsionally-induced contact-force conductors for electrical connect...

Signal-segregating connector system

Interconnect system without through-holes

Tapered dielectric and conductor structures and applications thereof

Multi-surface contact IC packaging structures and assemblies

Multi-surface IC packaging structures and methods for their manufac...

Refinement of a search query based on information stored on a local...