Paul Caprioli

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Mechanism for increasing the effective capacity of the working regi...
- Patent number 9,256,438
- Issue date Feb 9, 2016
- Oracle America, Inc.
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Store queue having restricted and unrestricted entries
- Patent number 9,146,744
- Issue date Sep 29, 2015
- Oracle America, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Anti-prefetch instruction
- Patent number 8,732,438
- Issue date May 20, 2014
- Oracle America, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Space-efficient mechanism to support additional scouting in a proce...
- Patent number 8,572,356
- Issue date Oct 29, 2013
- Oracle America, Inc.
- Sherman H. Yip
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Index generation for cache memories
- Patent number 8,484,434
- Issue date Jul 9, 2013
- Oracle America, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with a register file that supports multiple-issue execution
- Patent number 8,447,931
- Issue date May 21, 2013
- Oracle America, Inc.
- Shailender Chaudhry
- G11 - INFORMATION STORAGE
Information Patent Grant
Pseudo-LRU cache line replacement for a high-speed cache
- Patent number 8,364,900
- Issue date Jan 29, 2013
- Oracle America, Inc.
- Paul Caprioli
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Facilitating transactional execution in a processor that supports s...
- Patent number 8,316,366
- Issue date Nov 20, 2012
- Oracle America, Inc.
- Sherman H. Yip
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified cache structure that facilitates accessing translation tabl...
- Patent number 8,185,692
- Issue date May 22, 2012
- Oracle America, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Merging checkpoints in an execute-ahead processor
- Patent number 8,181,002
- Issue date May 15, 2012
- Oracle America, Inc.
- Sherman H. Yip
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for programmatically rewinding a register insi...
- Patent number 8,161,273
- Issue date Apr 17, 2012
- Oracle America, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using address and non-address information for improved index genera...
- Patent number 8,151,084
- Issue date Apr 3, 2012
- Oracle America, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for determining cache storage locations based...
- Patent number 8,065,485
- Issue date Nov 22, 2011
- Oracle America, Inc.
- Gideon N. Levinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for improving transactional memory commit latency
- Patent number 8,041,900
- Issue date Oct 18, 2011
- Oracle America, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aggressive store merging in a processor that supports checkpointing
- Patent number 7,934,080
- Issue date Apr 26, 2011
- Oracle America, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for synchronizing threads on a processor that...
- Patent number 7,930,695
- Issue date Apr 19, 2011
- Oracle America, Inc.
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for recovering from branch misprediction
- Patent number 7,890,739
- Issue date Feb 15, 2011
- Oracle America, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Return address stack recovery in a speculative execution computing...
- Patent number 7,836,290
- Issue date Nov 16, 2010
- Oracle America, Inc.
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for measuring performance during speculative e...
- Patent number 7,757,068
- Issue date Jul 13, 2010
- Oracle America, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for counting instructions during speculative e...
- Patent number 7,716,457
- Issue date May 11, 2010
- Oracle America, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for selectively prefetching based on resource...
- Patent number 7,707,359
- Issue date Apr 27, 2010
- Oracle America, Inc.
- Wayne Mesard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for enforcing membar instruction semantics in...
- Patent number 7,689,813
- Issue date Mar 30, 2010
- Sun Microsystems, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and structure for coordinating instruction execution in out-...
- Patent number 7,650,487
- Issue date Jan 19, 2010
- Sun Microsystems, Inc.
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch target aware instruction prefetching technique
- Patent number 7,647,477
- Issue date Jan 12, 2010
- Sun Microsystems, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Avoiding live-lock in a processor that supports speculative execution
- Patent number 7,634,639
- Issue date Dec 15, 2009
- Sun Microsystems, Inc.
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for using multiple threads to spectulatively e...
- Patent number 7,634,641
- Issue date Dec 15, 2009
- Sun Microsystems, Inc.
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reporting failure conditions during transa...
- Patent number 7,617,421
- Issue date Nov 10, 2009
- Sun Microsystems, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preventing register data flow hazards in an SST processor
- Patent number 7,610,470
- Issue date Oct 27, 2009
- Sun Microsystems, Inc.
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for hardware tracking of return address after tail call e...
- Patent number 7,610,474
- Issue date Oct 27, 2009
- Sun Microsystems, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and structure for concurrent branch prediction in a processor
- Patent number 7,590,830
- Issue date Sep 15, 2009
- Sun Microsystems, Inc.
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INDEX GENERATION FOR CACHE MEMORIES
- Publication number 20120166756
- Publication date Jun 28, 2012
- ORACLE INTERNATIONAL CORPORATION
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPACE-EFFICIENT MECHANISM TO SUPPORT ADDITIONAL SCOUTING IN A PROCE...
- Publication number 20110167243
- Publication date Jul 7, 2011
- Sherman H. Yip
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR DETERMINING CACHE STORAGE LOCATIONS BASED...
- Publication number 20100299482
- Publication date Nov 25, 2010
- Gideon N. Levinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFIED CACHE STRUCTURE THAT FACILITATES ACCESSING TRANSLATION TABL...
- Publication number 20100205344
- Publication date Aug 12, 2010
- SUN MICROSYSTEMS, INC.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM FOR INCREASING THE EFFECTIVE CAPACITY OF THE WORKING REGI...
- Publication number 20100180103
- Publication date Jul 15, 2010
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMI-ABSOLUTE BRANCH INSTRUCTIONS FOR EFFICIENT COMPUTERS
- Publication number 20100161950
- Publication date Jun 24, 2010
- SUN MICROSYSTEMS, INC.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AGGRESSIVE STORE MERGING IN A PROCESSOR THAT SUPPORTS CHECKPOINTING
- Publication number 20090300338
- Publication date Dec 3, 2009
- SUN MICROSYSTEMS, INC.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORE QUEUE
- Publication number 20090282225
- Publication date Nov 12, 2009
- SUN MICROSYSTEMS, INC.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ANTI-PREFETCH INSTRUCTION
- Publication number 20090265532
- Publication date Oct 22, 2009
- SUN MICROSYSTEMS, INC.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FACILITATING TRANSACTIONAL EXECUTION IN A PROCESSOR THAT SUPPORTS S...
- Publication number 20090254905
- Publication date Oct 8, 2009
- SUN MICROSYSTEMS, INC.
- Sherman H. Yip
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Floating Point Unit and Cryptographic Unit Having a Shared Multipli...
- Publication number 20090234866
- Publication date Sep 17, 2009
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PROGRAMMATICALLY REWINDING A REGISTER INSI...
- Publication number 20090217013
- Publication date Aug 27, 2009
- SUN MICROSYSTEMS, INC.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR RECOVERING FROM BRANCH MISPREDICTION
- Publication number 20090210683
- Publication date Aug 20, 2009
- SUN MICROSYSTEMS, INC.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PSEUDO-LRU CACHE LINE REPLACEMENT FOR A HIGH-SPEED CACHE
- Publication number 20090204761
- Publication date Aug 13, 2009
- SUN MICROSYSTEMS, INC.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INDEX GENERATION FOR CACHE MEMORIES
- Publication number 20090187727
- Publication date Jul 23, 2009
- SUN MICROSYSTEMS, INC.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMI-ORDERED TRANSACTIONS
- Publication number 20090187906
- Publication date Jul 23, 2009
- SUN MICROSYSTEMS, INC.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR IMPROVING TRANSACTIONAL MEMORY COMMIT LATENCY
- Publication number 20090182956
- Publication date Jul 16, 2009
- SUN MICROSYSTEMS, INC.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Preventing register data flow hazards in an SST processor
- Publication number 20080189531
- Publication date Aug 7, 2008
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for measuring performance during speculative e...
- Publication number 20080172548
- Publication date Jul 17, 2008
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for counting instructions during speculative e...
- Publication number 20080172549
- Publication date Jul 17, 2008
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for reporting failure conditions during transa...
- Publication number 20080126883
- Publication date May 29, 2008
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically shared high-speed jump target predictor
- Publication number 20080005545
- Publication date Jan 3, 2008
- Edmond H. Yip
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for synchronizing threads on a processor that...
- Publication number 20070240158
- Publication date Oct 11, 2007
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technique for eliminating dead stores in a processor
- Publication number 20070226425
- Publication date Sep 27, 2007
- Sun Microsystems, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PATCHABLE AND/OR PROGRAMMABLE PRE-DECODE
- Publication number 20070226464
- Publication date Sep 27, 2007
- SUN MICROSYSTEMS, INC.
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PATCHABLE AND/OR PROGRAMMABLE DECODE USING PREDECODE SELECTION
- Publication number 20070226463
- Publication date Sep 27, 2007
- SUN MICROSYSTEMS, INC.
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for sampling instructions on a processor that...
- Publication number 20070226472
- Publication date Sep 27, 2007
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technique for executing selected instructions in order
- Publication number 20070226465
- Publication date Sep 27, 2007
- Sun Microsystems, Inc.
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Supporting out-of-order issue in an execute-ahead processor
- Publication number 20070186081
- Publication date Aug 9, 2007
- Shailender Chaudhry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Collapsible front-end translation for instruction fetch
- Publication number 20070180218
- Publication date Aug 2, 2007
- Sun Microsystems, Inc.
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING

Paul Caprioli

Person

Patents Grantslast 30 patents

Mechanism for increasing the effective capacity of the working regi...

Store queue having restricted and unrestricted entries

Anti-prefetch instruction

Space-efficient mechanism to support additional scouting in a proce...

Index generation for cache memories

Processor with a register file that supports multiple-issue execution

Pseudo-LRU cache line replacement for a high-speed cache

Facilitating transactional execution in a processor that supports s...

Unified cache structure that facilitates accessing translation tabl...

Merging checkpoints in an execute-ahead processor

Method and apparatus for programmatically rewinding a register insi...

Using address and non-address information for improved index genera...

Method and apparatus for determining cache storage locations based...

Method and apparatus for improving transactional memory commit latency

Aggressive store merging in a processor that supports checkpointing

Method and apparatus for synchronizing threads on a processor that...

Method and apparatus for recovering from branch misprediction

Return address stack recovery in a speculative execution computing...

Method and apparatus for measuring performance during speculative e...

Method and apparatus for counting instructions during speculative e...

Method and apparatus for selectively prefetching based on resource...

Method and apparatus for enforcing membar instruction semantics in...

Method and structure for coordinating instruction execution in out-...

Branch target aware instruction prefetching technique

Avoiding live-lock in a processor that supports speculative execution

Method and apparatus for using multiple threads to spectulatively e...

Method and apparatus for reporting failure conditions during transa...

Preventing register data flow hazards in an SST processor

Mechanism for hardware tracking of return address after tail call e...

Method and structure for concurrent branch prediction in a processor

Patents Applicationslast 30 patents

INDEX GENERATION FOR CACHE MEMORIES

SPACE-EFFICIENT MECHANISM TO SUPPORT ADDITIONAL SCOUTING IN A PROCE...

METHOD AND APPARATUS FOR DETERMINING CACHE STORAGE LOCATIONS BASED...

UNIFIED CACHE STRUCTURE THAT FACILITATES ACCESSING TRANSLATION TABL...

MECHANISM FOR INCREASING THE EFFECTIVE CAPACITY OF THE WORKING REGI...

SEMI-ABSOLUTE BRANCH INSTRUCTIONS FOR EFFICIENT COMPUTERS

AGGRESSIVE STORE MERGING IN A PROCESSOR THAT SUPPORTS CHECKPOINTING

STORE QUEUE

ANTI-PREFETCH INSTRUCTION

FACILITATING TRANSACTIONAL EXECUTION IN A PROCESSOR THAT SUPPORTS S...

Floating Point Unit and Cryptographic Unit Having a Shared Multipli...

METHOD AND APPARATUS FOR PROGRAMMATICALLY REWINDING A REGISTER INSI...

METHOD AND APPARATUS FOR RECOVERING FROM BRANCH MISPREDICTION

PSEUDO-LRU CACHE LINE REPLACEMENT FOR A HIGH-SPEED CACHE

INDEX GENERATION FOR CACHE MEMORIES

SEMI-ORDERED TRANSACTIONS

METHOD AND APPARATUS FOR IMPROVING TRANSACTIONAL MEMORY COMMIT LATENCY

Preventing register data flow hazards in an SST processor

Method and apparatus for measuring performance during speculative e...

Method and apparatus for counting instructions during speculative e...

Method and apparatus for reporting failure conditions during transa...

Dynamically shared high-speed jump target predictor

Method and apparatus for synchronizing threads on a processor that...

Technique for eliminating dead stores in a processor

PATCHABLE AND/OR PROGRAMMABLE PRE-DECODE

PATCHABLE AND/OR PROGRAMMABLE DECODE USING PREDECODE SELECTION

Method and apparatus for sampling instructions on a processor that...

Technique for executing selected instructions in order

Supporting out-of-order issue in an execute-ahead processor

Collapsible front-end translation for instruction fetch