Paul E. Dunn

Person

Cambridge, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Electrostatic discharge failure avoidance through interaction betwe...
- Patent number 7,496,877
- Issue date Feb 24, 2009
- International Business Machines Corporation
- Andrew D. Huber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of optimizing customizable filler cells in an integrated cir...
- Patent number 7,444,609
- Issue date Oct 28, 2008
- International Business Machines Corporation
- Steven E. Charlebois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Macro design techniques to accommodate chip level wiring and circui...
- Patent number 7,096,436
- Issue date Aug 22, 2006
- International Business Machines Corporation
- Thomas R. Bednar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Macro design techniques to accommodate chip level wiring and circui...
- Patent number 6,883,155
- Issue date Apr 19, 2005
- International Business Machines Corporation
- Thomas R. Bednar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Macro design techniques to accommodate chip level wiring and circui...
- Patent number 6,543,040
- Issue date Apr 1, 2003
- International Business Machines Corporation
- Thomas R. Bednar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of assigning integrated circuit I/O signals in an integrated...
- Patent number 6,499,134
- Issue date Dec 24, 2002
- International Business Machines Corporation
- Patrick H. Buffet
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF OPTIMIZING CUSTOMIZABLE FILLER CELLS IN AN INTEGRATED CIR...
- Publication number 20080005712
- Publication date Jan 3, 2008
- Steven E. Charlebois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electrostatic discharge failure avoidance through interaction betwe...
- Publication number 20070035900
- Publication date Feb 15, 2007
- International Business Machines Corporation
- Andrew D. Huber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Macro design techniques to accommodate chip level wiring and circui...
- Publication number 20050039153
- Publication date Feb 17, 2005
- International Business Machines Corporation
- Thomas R. Bednar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Macro design techniques to accommodate chip level wiring and circui...
- Publication number 20030204829
- Publication date Oct 30, 2003
- International Business Machines Corporation
- Thomas R. Bednar
- G06 - COMPUTING CALCULATING COUNTING

Paul E. Dunn

Person

Patents Grantslast 30 patents

Electrostatic discharge failure avoidance through interaction betwe...

Method of optimizing customizable filler cells in an integrated cir...

Macro design techniques to accommodate chip level wiring and circui...

Macro design techniques to accommodate chip level wiring and circui...

Macro design techniques to accommodate chip level wiring and circui...

Method of assigning integrated circuit I/O signals in an integrated...

Patents Applicationslast 30 patents

METHOD OF OPTIMIZING CUSTOMIZABLE FILLER CELLS IN AN INTEGRATED CIR...

Electrostatic discharge failure avoidance through interaction betwe...

Macro design techniques to accommodate chip level wiring and circui...

Macro design techniques to accommodate chip level wiring and circui...