Paul H. OuYang

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Programmable connection and isolation of active regions in an integ...
- Patent number 8,564,073
- Issue date Oct 22, 2013
- HRL Laboratories, LLC
- William M. Clark
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable connection and isolation of active regions in an integ...
- Patent number 8,168,487
- Issue date May 1, 2012
- HRL Laboratories, LLC
- William M. Clark, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Building block for a secure CMOS logic cell library
- Patent number 8,111,089
- Issue date Feb 7, 2012
- Syphermedia International, Inc.
- Ronald P. Cocchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Symmetric non-intrusive and covert technique to render a transistor...
- Patent number 8,049,281
- Issue date Nov 1, 2011
- HRL Laboratories, LLC
- Lap-Wai Chow
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
CMOS-compatible MEM switches and method of making
- Patent number 6,667,245
- Issue date Dec 23, 2003
- HRL Laboratories, LLC
- Lap-Wai Chow
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Reduction of standby current
- Patent number 6,535,443
- Issue date Mar 18, 2003
- DMEL Incorporated
- Paul H. OuYang
- G11 - INFORMATION STORAGE
Information Patent Grant
CMOS-compatible MEM switches and method of making
- Patent number 6,396,368
- Issue date May 28, 2002
- HRL Laboratories, LLC
- Lap-Wai Chow
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
High-speed output driver with an impedance adjustment scheme
- Patent number 6,351,172
- Issue date Feb 26, 2002
- Dmel Inc.
- Paul H. Ouyang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Over-current protection circuit for linear voltage regulators
- Patent number 6,347,029
- Issue date Feb 12, 2002
- Dmel, Inc.
- Paul H. Ouyang
- G05 - CONTROLLING REGULATING
Information Patent Grant
Controlling the precharge operation in a DRAM array in a SRAM inter...
- Patent number 6,288,959
- Issue date Sep 11, 2001
- DMEL Incorporated
- Paul H. OuYang
- G11 - INFORMATION STORAGE
Information Patent Grant
Short-channel V-groove complementary MOS device
- Patent number 4,131,907
- Issue date Dec 26, 1978
- Paul H. Ouyang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
BUILDING BLOCK FOR A SECURE CMOS LOGIC CELL LIBRARY
- Publication number 20100301903
- Publication date Dec 2, 2010
- SYPHERMEDIA INTERNATIONAL, INC.
- Ronald P. Cocchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable connection and isolation of active regions in an integ...
- Publication number 20080079082
- Publication date Apr 3, 2008
- HRL LABORATORIES, LLC
- William M. Clark
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
5 Volt tolerant input/output buffer
- Publication number 20030151428
- Publication date Aug 14, 2003
- Paul H. OuYang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CMOS-compatible MEM switches and method of making
- Publication number 20020055260
- Publication date May 9, 2002
- HRL Laboratories
- Lap-Wai Chow
- B81 - MICRO-STRUCTURAL TECHNOLOGY

Paul H. OuYang

Person

Patents Grantslast 30 patents

Programmable connection and isolation of active regions in an integ...

Programmable connection and isolation of active regions in an integ...

Building block for a secure CMOS logic cell library

Symmetric non-intrusive and covert technique to render a transistor...

CMOS-compatible MEM switches and method of making

Reduction of standby current

CMOS-compatible MEM switches and method of making

High-speed output driver with an impedance adjustment scheme

Over-current protection circuit for linear voltage regulators

Controlling the precharge operation in a DRAM array in a SRAM inter...

Short-channel V-groove complementary MOS device

Patents Applicationslast 30 patents

BUILDING BLOCK FOR A SECURE CMOS LOGIC CELL LIBRARY

Programmable connection and isolation of active regions in an integ...

5 Volt tolerant input/output buffer

CMOS-compatible MEM switches and method of making