Paul Wallner

Person

Prien, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Receiver architecture
- Patent number 10,127,176
- Issue date Nov 13, 2018
- Infineon Technologies AG
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Receiver architecture
- Patent number 9,582,451
- Issue date Feb 28, 2017
- Infineon Technologies AG
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Over-current detection for bus line drivers
- Patent number 9,417,983
- Issue date Aug 16, 2016
- Infineon Technologies AG
- Dieter Metzner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shutdown protection for bus line drivers
- Patent number 9,172,235
- Issue date Oct 27, 2015
- Infineon Technologies AG
- Dieter Metzner
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Semiconductor memory chip and memory system
- Patent number 8,108,643
- Issue date Jan 31, 2012
- Qimonda AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Grant
Refreshing the content of a memory cell of a memory arrangement
- Patent number 7,733,732
- Issue date Jun 8, 2010
- Qimonda AG
- Christian Sichert
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory arrangement having efficient arrangement of devices
- Patent number 7,725,647
- Issue date May 25, 2010
- Qimonda AG
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device, memory system and method of operating such
- Patent number 7,663,964
- Issue date Feb 16, 2010
- Qimonda AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method of operating such
- Patent number 7,633,814
- Issue date Dec 15, 2009
- Qimonda AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of transferring signals between a memory device and a memory...
- Patent number 7,587,655
- Issue date Sep 8, 2009
- Infineon Technologies AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory arrangement
- Patent number 7,536,528
- Issue date May 19, 2009
- Qimonda AG
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory system and semiconductor memory chip
- Patent number 7,523,250
- Issue date Apr 21, 2009
- Qimonda AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Grant
Data conversion
- Patent number 7,515,075
- Issue date Apr 7, 2009
- Qimonda AG
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-speed interface circuit for semiconductor memory chips and mem...
- Patent number 7,475,187
- Issue date Jan 6, 2009
- Infineon Technologies AG
- Peter Gregorius
- G11 - INFORMATION STORAGE
Information Patent Grant
Data memory system and method for transferring data into a data memory
- Patent number 7,428,689
- Issue date Sep 23, 2008
- Infineon Technologies AG
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory chip
- Patent number 7,415,581
- Issue date Aug 19, 2008
- Infineon Technologies AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory chip
- Patent number 7,391,657
- Issue date Jun 24, 2008
- Infineon Technologies AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and method of accessing memory chips of a memory system
- Patent number 7,339,840
- Issue date Mar 4, 2008
- Infineon Technologies AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module with a clock signal regeneration circuit and a regist...
- Patent number 7,334,150
- Issue date Feb 19, 2008
- Infineon Technologies AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous signal generator
- Patent number 7,325,152
- Issue date Jan 29, 2008
- Infineon Technologies AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for phase detection
- Patent number 7,313,211
- Issue date Dec 25, 2007
- Infineon Technologies AG
- Peter Gregorius
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Control unit for deactivating and activating the control signals
- Patent number 7,304,909
- Issue date Dec 4, 2007
- Infineon Technologies AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous parallel/serial converter
- Patent number 7,245,239
- Issue date Jul 17, 2007
- Infineon Technologies AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory chip
- Patent number 7,221,615
- Issue date May 22, 2007
- Infineon Technologies AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed interface circuit for semiconductor memory chips and mem...
- Patent number 7,184,360
- Issue date Feb 27, 2007
- Infineon Technologies, AG
- Peter Gregorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device, memory controller and memory system having bidirecti...
- Patent number 7,180,821
- Issue date Feb 20, 2007
- Infineon Technologies AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with two clock lines and a memory device
- Patent number 7,173,877
- Issue date Feb 6, 2007
- Infineon Technologies AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory system and method for the transfer of write an...
- Patent number 7,050,340
- Issue date May 23, 2006
- Infineon Technologies, AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
RECEIVER ARCHITECTURE
- Publication number 20170139870
- Publication date May 18, 2017
- Infineon Technologies AG
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OVER-CURRENT DETECTION FOR BUS LINE DRIVERS
- Publication number 20140359190
- Publication date Dec 4, 2014
- Dieter Metzner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHUTDOWN PROTECTION FOR BUS LINE DRIVERS
- Publication number 20140355158
- Publication date Dec 4, 2014
- Dieter Metzner
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
Receiver Architecture
- Publication number 20140223050
- Publication date Aug 7, 2014
- INFINEON TECHNOLOGIES AG
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA CONVERSION
- Publication number 20090073010
- Publication date Mar 19, 2009
- QIMONDA AG
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND METHOD OF TESTING A MEMORY DEVICE
- Publication number 20090016130
- Publication date Jan 15, 2009
- MANFRED MENKE
- G11 - INFORMATION STORAGE
Information Patent Application
Method For Processing Data in a Memory Arrangement, Memory Arrangem...
- Publication number 20080229033
- Publication date Sep 18, 2008
- Qimonda AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR TRANSMITTING CONFIGURATION DATA VIA A CONFIGURATION DATA...
- Publication number 20080228988
- Publication date Sep 18, 2008
- Qimonda AG
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controller
- Publication number 20080222443
- Publication date Sep 11, 2008
- QIMONDA AG
- Paul Wallner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REFRESHING THE CONTENT OF A MEMORY CELL OF A MEMORY ARRANGEMENT
- Publication number 20080068913
- Publication date Mar 20, 2008
- QIMONDA AG
- Christian Sichert
- G11 - INFORMATION STORAGE
Information Patent Application
PARALLELIZATION OF SERIAL DIGITAL INPUT SIGNALS
- Publication number 20080055126
- Publication date Mar 6, 2008
- QIMONDA AG
- Chaitanya Dudha
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Integrated memory device and method of operating a memory device
- Publication number 20080028148
- Publication date Jan 31, 2008
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM AND METHOD OF OPERATING SUCH
- Publication number 20070280007
- Publication date Dec 6, 2007
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD OF OPERATING SUCH
- Publication number 20070247929
- Publication date Oct 25, 2007
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Memory Chip
- Publication number 20070217268
- Publication date Sep 20, 2007
- INFINEON TECHNOLOGIES AG
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRANGEMENT
- Publication number 20070201296
- Publication date Aug 30, 2007
- Qimonda AG
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ARRANGEMENT
- Publication number 20070204116
- Publication date Aug 30, 2007
- Qimonda AG
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of transferring signals between a memory device and a memory...
- Publication number 20070091711
- Publication date Apr 26, 2007
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory chip
- Publication number 20070076004
- Publication date Apr 5, 2007
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY CHIP
- Publication number 20070076508
- Publication date Apr 5, 2007
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Application
High-speed interface circuit for semiconductor memory chips and mem...
- Publication number 20070073942
- Publication date Mar 29, 2007
- Peter Gregorius
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Data memory system and method for transferring data into a data memory
- Publication number 20070061671
- Publication date Mar 15, 2007
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor memory system, semiconductor memory chip, and method...
- Publication number 20070061494
- Publication date Mar 15, 2007
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory system and semiconductor memory chip
- Publication number 20070047372
- Publication date Mar 1, 2007
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory chip and memory system
- Publication number 20070028028
- Publication date Feb 1, 2007
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Application
Synchronous signal generator
- Publication number 20070006010
- Publication date Jan 4, 2007
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory chip and method of protecting a memory core th...
- Publication number 20070006057
- Publication date Jan 4, 2007
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Application
Memory system and method of accessing memory chips of a memory system
- Publication number 20060291263
- Publication date Dec 28, 2006
- Paul Wallner
- G11 - INFORMATION STORAGE
Information Patent Application
High-speed interface circuit for semiconductor memory chips and mem...
- Publication number 20060285424
- Publication date Dec 21, 2006
- Peter Gregorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Control unit for deactivating and activating the control signals
- Publication number 20060221761
- Publication date Oct 5, 2006
- Paul Wallner
- G11 - INFORMATION STORAGE

Paul Wallner

Person

Patents Grantslast 30 patents

Receiver architecture

Receiver architecture

Over-current detection for bus line drivers

Shutdown protection for bus line drivers

Semiconductor memory chip and memory system

Refreshing the content of a memory cell of a memory arrangement

Memory arrangement having efficient arrangement of devices

Memory device, memory system and method of operating such

Memory device and method of operating such

Method of transferring signals between a memory device and a memory...

Memory arrangement

Semiconductor memory system and semiconductor memory chip

Data conversion

High-speed interface circuit for semiconductor memory chips and mem...

Data memory system and method for transferring data into a data memory

Semiconductor memory chip

Semiconductor memory chip

Memory system and method of accessing memory chips of a memory system

Memory module with a clock signal regeneration circuit and a regist...

Synchronous signal generator

Method and apparatus for phase detection

Control unit for deactivating and activating the control signals

Synchronous parallel/serial converter

Semiconductor memory chip

High-speed interface circuit for semiconductor memory chips and mem...

Memory device, memory controller and memory system having bidirecti...

Memory system with two clock lines and a memory device

Semiconductor memory system and method for the transfer of write an...

Patents Applicationslast 30 patents

RECEIVER ARCHITECTURE

OVER-CURRENT DETECTION FOR BUS LINE DRIVERS

SHUTDOWN PROTECTION FOR BUS LINE DRIVERS

Receiver Architecture

DATA CONVERSION

MEMORY DEVICE AND METHOD OF TESTING A MEMORY DEVICE

Method For Processing Data in a Memory Arrangement, Memory Arrangem...

METHOD FOR TRANSMITTING CONFIGURATION DATA VIA A CONFIGURATION DATA...

Controller

REFRESHING THE CONTENT OF A MEMORY CELL OF A MEMORY ARRANGEMENT

PARALLELIZATION OF SERIAL DIGITAL INPUT SIGNALS

Integrated memory device and method of operating a memory device

MEMORY DEVICE, MEMORY SYSTEM AND METHOD OF OPERATING SUCH

MEMORY DEVICE AND METHOD OF OPERATING SUCH

Semiconductor Memory Chip

MEMORY ARRANGEMENT

MEMORY ARRANGEMENT

Method of transferring signals between a memory device and a memory...

Semiconductor memory chip

SEMICONDUCTOR MEMORY CHIP

High-speed interface circuit for semiconductor memory chips and mem...

Data memory system and method for transferring data into a data memory

Semiconductor memory system, semiconductor memory chip, and method...

Semiconductor memory system and semiconductor memory chip

Semiconductor memory chip and memory system

Synchronous signal generator

Semiconductor memory chip and method of protecting a memory core th...

Memory system and method of accessing memory chips of a memory system

High-speed interface circuit for semiconductor memory chips and mem...

Control unit for deactivating and activating the control signals