Pedro Marcuello

Person

Barcelona, ES

People

Patents Grantslast 30 patents

Information Patent Grant
Instruction and logic for optimization level aware branch prediction
- Patent number 10,157,063
- Issue date Dec 18, 2018
- Intel Corporation
- Polychronis Xekalakis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory address collision detection of ordered parallel threads with...
- Patent number 10,101,999
- Issue date Oct 16, 2018
- Intel Corporation
- Enrique De Lucas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Propagating a prefetching profile bit from a prefetch queue to a da...
- Patent number 10,013,326
- Issue date Jul 3, 2018
- Intel Corporation
- Raul Martinez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Exploiting frame to frame coherency in a sort-middle architecture
- Patent number 9,940,686
- Issue date Apr 10, 2018
- Intel Corporation
- Juan Fernandez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Exploiting frame to frame coherency in a sort-middle architecture
- Patent number 9,922,393
- Issue date Mar 20, 2018
- Intel Corporation
- Juan Fernandez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Exploiting frame to frame coherency in a sort-middle architecture
- Patent number 9,904,977
- Issue date Feb 27, 2018
- Intel Corporation
- Juan Fernandez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managed instruction cache prefetching
- Patent number 9,811,341
- Issue date Nov 7, 2017
- Intel Corporation
- Kyriakos A. Stavrou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory address collision detection of ordered parallel threads with...
- Patent number 9,542,193
- Issue date Jan 10, 2017
- Intel Corporation
- Enrique De Lucas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Image signal processor with a block checking circuit
- Patent number 9,374,542
- Issue date Jun 21, 2016
- Intel Corporation
- Kyriakos Stavrou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Branch pruning in architectures with speculation support
- Patent number 8,813,057
- Issue date Aug 19, 2014
- Intel Corporation
- Carlos García Quiñones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative multi-threading for instruction prefetch and/or trace p...
- Patent number 8,719,806
- Issue date May 6, 2014
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Replacement policy for hot code detection
- Patent number 8,612,698
- Issue date Dec 17, 2013
- Intel Corporation
- Pedro Lopez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling speculative state information in a cache coherency protocol
- Patent number 8,185,700
- Issue date May 22, 2012
- Intel Corporation
- Carlos Madriles Gimeno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-version register file for multithreading processors with live...
- Patent number 8,166,282
- Issue date Apr 24, 2012
- Intel Corporation
- Carlos Madriles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative multi-threading for instruction prefetch and/or trace p...
- Patent number 7,814,469
- Issue date Oct 12, 2010
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selection of spawning pairs for a speculative multithreaded processor
- Patent number 7,458,065
- Issue date Nov 25, 2008
- Intel Corporation
- Jesus Sanchez
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROFILING ASYNCHRONOUS EVENTS RESULTING FROM THE EXECUTION OF SOFTW...
- Publication number 20190004916
- Publication date Jan 3, 2019
- Intel Corporation
- Raul Martinez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ADDRESS COLLISION DETECTION OF ORDERED PARALLEL THREADS WITH...
- Publication number 20170147344
- Publication date May 25, 2017
- Intel Corporation
- ENRIQUE DE LUCAS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Exploiting Frame to Frame Coherency in a Sort-Middle Architecture
- Publication number 20160328820
- Publication date Nov 10, 2016
- Intel Corporation
- Juan Fernandez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Exploiting Frame to Frame Coherency in a Sort-Middle Architecture
- Publication number 20160027144
- Publication date Jan 28, 2016
- Intel Corporation
- Juan Fernandez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Exploiting Frame to Frame Coherency in a Sort-Middle Architecture
- Publication number 20150332429
- Publication date Nov 19, 2015
- Juan Fernandez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMAGE SIGNAL PROCESSOR WITH A BLOCK CHECKING CIRCUIT
- Publication number 20150281602
- Publication date Oct 1, 2015
- Intel Corporation
- KYRIAKOS STAVROU
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory Address Collision Detection Of Ordered Parallel Threads With...
- Publication number 20140189712
- Publication date Jul 3, 2014
- Enrique DE LUCAS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS AND SYSTEM FOR SELECTIVE EXECUTION OF A COMMIT IN...
- Publication number 20140156976
- Publication date Jun 5, 2014
- Enric Gibert Codina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Branch Prediction Gating
- Publication number 20140143526
- Publication date May 22, 2014
- Polychronis Xekalakis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC FOR OPTIMIZATION LEVEL AWARE BRANCH PREDICTION
- Publication number 20140095849
- Publication date Apr 3, 2014
- Polychronis Xekalakis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGED INSTRUCTION CACHE PREFETCHING
- Publication number 20140019721
- Publication date Jan 16, 2014
- Kyriakos A. Stavrou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROFILING ASYNCHRONOUS EVENTS RESULTING FROM THE EXECUTION OF SOFTW...
- Publication number 20130332705
- Publication date Dec 12, 2013
- Raul Martinez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CONTROLLING A MXCSR
- Publication number 20130326199
- Publication date Dec 5, 2013
- Grigorios Magklis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPORT FOR SPECULATIVE OWNERSHIP WITHOUT DATA
- Publication number 20130268735
- Publication date Oct 10, 2013
- Enric Gibert Codina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Branch Predictor with Jump Ahead Logic to Jump Over Portions of Pro...
- Publication number 20120311308
- Publication date Dec 6, 2012
- Polychronis Xekalakis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECULATIVE MULTI-THREADING FOR INSTRUCTION PREFETCH AND/OR TRACE P...
- Publication number 20100332811
- Publication date Dec 30, 2010
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REPLACEMENT POLICY FOR HOT CODE DETECTION
- Publication number 20100115247
- Publication date May 6, 2010
- Pedro Lopez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enabling Speculative State Information in a Cache Coherency Protocol
- Publication number 20090083488
- Publication date Mar 26, 2009
- Carlos Madriles Gimeno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BRANCH PRUNING IN ARCHITECTURES WITH SPECULATION SUPPORT
- Publication number 20080244223
- Publication date Oct 2, 2008
- Carlos Garcia Quinones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus, System, and Method of a Memory Arrangement for Speculati...
- Publication number 20080134196
- Publication date Jun 5, 2008
- INTEL CORPORATION
- Carlos Madriles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selection of spawning pairs for a speculative multithreaded processor
- Publication number 20060064692
- Publication date Mar 23, 2006
- Jesus Sanchez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Analyzer for spawning pairs in speculative multithreaded processor
- Publication number 20060047495
- Publication date Mar 2, 2006
- Jesus Sanchez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-version register file for multithreading processors with live...
- Publication number 20060020775
- Publication date Jan 26, 2006
- Carlos Madriles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Control-quasi-independent-points guided speculative multithreading
- Publication number 20040154010
- Publication date Aug 5, 2004
- Pedro Marcuello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Speculative multi-threading for instruction prefetch and/or trace p...
- Publication number 20040154011
- Publication date Aug 5, 2004
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING

Pedro Marcuello

Person

Patents Grantslast 30 patents

Instruction and logic for optimization level aware branch prediction

Memory address collision detection of ordered parallel threads with...

Propagating a prefetching profile bit from a prefetch queue to a da...

Exploiting frame to frame coherency in a sort-middle architecture

Exploiting frame to frame coherency in a sort-middle architecture

Exploiting frame to frame coherency in a sort-middle architecture

Managed instruction cache prefetching

Memory address collision detection of ordered parallel threads with...

Image signal processor with a block checking circuit

Branch pruning in architectures with speculation support

Speculative multi-threading for instruction prefetch and/or trace p...

Replacement policy for hot code detection

Enabling speculative state information in a cache coherency protocol

Multi-version register file for multithreading processors with live...

Speculative multi-threading for instruction prefetch and/or trace p...

Selection of spawning pairs for a speculative multithreaded processor

Patents Applicationslast 30 patents

PROFILING ASYNCHRONOUS EVENTS RESULTING FROM THE EXECUTION OF SOFTW...

MEMORY ADDRESS COLLISION DETECTION OF ORDERED PARALLEL THREADS WITH...

Exploiting Frame to Frame Coherency in a Sort-Middle Architecture

Exploiting Frame to Frame Coherency in a Sort-Middle Architecture

Exploiting Frame to Frame Coherency in a Sort-Middle Architecture

IMAGE SIGNAL PROCESSOR WITH A BLOCK CHECKING CIRCUIT

Memory Address Collision Detection Of Ordered Parallel Threads With...

METHOD, APPARATUS AND SYSTEM FOR SELECTIVE EXECUTION OF A COMMIT IN...

Branch Prediction Gating

INSTRUCTION AND LOGIC FOR OPTIMIZATION LEVEL AWARE BRANCH PREDICTION

MANAGED INSTRUCTION CACHE PREFETCHING

PROFILING ASYNCHRONOUS EVENTS RESULTING FROM THE EXECUTION OF SOFTW...

METHOD AND APPARATUS FOR CONTROLLING A MXCSR

SUPPORT FOR SPECULATIVE OWNERSHIP WITHOUT DATA

Branch Predictor with Jump Ahead Logic to Jump Over Portions of Pro...

SPECULATIVE MULTI-THREADING FOR INSTRUCTION PREFETCH AND/OR TRACE P...

REPLACEMENT POLICY FOR HOT CODE DETECTION

Enabling Speculative State Information in a Cache Coherency Protocol

BRANCH PRUNING IN ARCHITECTURES WITH SPECULATION SUPPORT

Apparatus, System, and Method of a Memory Arrangement for Speculati...

Selection of spawning pairs for a speculative multithreaded processor

Analyzer for spawning pairs in speculative multithreaded processor

Multi-version register file for multithreading processors with live...

Control-quasi-independent-points guided speculative multithreading

Speculative multi-threading for instruction prefetch and/or trace p...