Peter J. Camporese

Person

Hopewell Junction, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Automated programmable process and method for the improvement of el...
- Patent number 6,629,298
- Issue date Sep 30, 2003
- International Business Machines Corporation
- Peter J. Camporese
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for evaluating decoupling capacitor placement for VLSI chips
- Patent number 6,618,844
- Issue date Sep 9, 2003
- International Business Machines Corporation
- Allan H. Dansky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for evaluating decoupling capacitor placement for VLSI chips
- Patent number 6,618,843
- Issue date Sep 9, 2003
- International Business Machines Corporation
- Allan H. Dansky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for performing coupling analysis
- Patent number 6,546,529
- Issue date Apr 8, 2003
- International Business Machines Corporation
- Allan H. Dansky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Contract methodology for concurrent hierarchical design
- Patent number 6,487,706
- Issue date Nov 26, 2002
- International Business Machines Corporation
- Keith G. Barkley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Routing program method for positioning unit pins in a hierarchicall...
- Patent number 6,460,169
- Issue date Oct 1, 2002
- International Business Machines Corporation
- Peter J. Camporese
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimal length method for positioning unit pins in a hierarchically...
- Patent number 6,415,428
- Issue date Jul 2, 2002
- International Business Machines Corporation
- Peter J. Camporese
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to identify unit pins that are not optimally positioned in a...
- Patent number 6,374,394
- Issue date Apr 16, 2002
- International Business Machines Corporation
- Peter J. Camporese
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for automating the placement of a repeater device in an opti...
- Patent number 6,341,365
- Issue date Jan 22, 2002
- International Business Machines Corporation
- Robert P. Dwyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for evaluating decoupling capacitor placement for VLSI chips
- Patent number 6,323,050
- Issue date Nov 27, 2001
- International Business Machines Corporation
- Allan H. Dansky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
X-Y grid tree clock distribution network with tunable tree and grid...
- Patent number 6,311,313
- Issue date Oct 30, 2001
- International Business Machines Corporation
- Peter J. Camporese
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
X-Y grid tree tuning method
- Patent number 6,205,571
- Issue date Mar 20, 2001
- International Business Machines Corporation
- Peter J. Camporese
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable clock tuning system and method
- Patent number 5,455,931
- Issue date Oct 3, 1995
- International Business Machines Corporation
- Peter J. Camporese
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method for evaluating decoupling capacitor placement for VLSI chips
- Publication number 20020040463
- Publication date Apr 4, 2002
- International Business Machines Corporation
- Allan H. Dansky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for evaluating decoupling capacitor placement for VLSI chips
- Publication number 20020040467
- Publication date Apr 4, 2002
- INTERNATION BUSINESS MACHINES CORPORATION
- Allan H. Dansky
- G06 - COMPUTING CALCULATING COUNTING

Peter J. Camporese

Person

Patents Grantslast 30 patents

Automated programmable process and method for the improvement of el...

Method for evaluating decoupling capacitor placement for VLSI chips

Method for evaluating decoupling capacitor placement for VLSI chips

Method for performing coupling analysis

Contract methodology for concurrent hierarchical design

Routing program method for positioning unit pins in a hierarchicall...

Minimal length method for positioning unit pins in a hierarchically...

Method to identify unit pins that are not optimally positioned in a...

Method for automating the placement of a repeater device in an opti...

Method for evaluating decoupling capacitor placement for VLSI chips

X-Y grid tree clock distribution network with tunable tree and grid...

X-Y grid tree tuning method

Programmable clock tuning system and method

Patents Applicationslast 30 patents

Method for evaluating decoupling capacitor placement for VLSI chips

Method for evaluating decoupling capacitor placement for VLSI chips