Peter J. Osler

Person

Jericho, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Providing secondary power pins in integrated circuit design
- Patent number 8,495,547
- Issue date Jul 23, 2013
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable detail automatic invocation of transistor level timing for...
- Patent number 6,829,755
- Issue date Dec 7, 2004
- International Business Machines Corporation
- Paul T. Gutwin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for fault-tolerant static timing analysis
- Patent number 6,795,951
- Issue date Sep 21, 2004
- International Business Machines Corporation
- David James Hathaway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of partitioning large transistor design to facilitate transi...
- Patent number 6,588,000
- Issue date Jul 1, 2003
- International Business Machines Corporation
- Paul T. Gutwin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Incremental design tuning and decision mediator
- Patent number 6,425,110
- Issue date Jul 23, 2002
- International Business Machines Corporation
- David J. Hathaway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for verifying timing rules for an integrated c...
- Patent number 6,023,567
- Issue date Feb 8, 2000
- International Business Machines Corporation
- Peter James Osler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel hierarchical timing correction
- Patent number 5,877,965
- Issue date Mar 2, 1999
- International Business Machines Corporation
- Nathaniel Douglas Hieter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Guess mechanism for virtual address translation
- Patent number 5,099,415
- Issue date Mar 24, 1992
- International Business Machines
- Peter J. Osler
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method and System for Providing Secondary Power Pins in Integrated...
- Publication number 20110113398
- Publication date May 12, 2011
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE DETAIL AUTOMATIC INVOCATION OF TRANSISTOR LEVEL TIMING FOR...
- Publication number 20030037306
- Publication date Feb 20, 2003
- International Business Machines Corporation
- Paul T. Gutwin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of partitioning large transistor design to facilitate transi...
- Publication number 20030033583
- Publication date Feb 13, 2003
- Paul T. Gutwin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for fault-tolerant static timing analysis
- Publication number 20020112195
- Publication date Aug 15, 2002
- International Business Machines Corporation
- David James Hathaway
- G06 - COMPUTING CALCULATING COUNTING

Peter J. Osler

Person

Patents Grantslast 30 patents

Providing secondary power pins in integrated circuit design

Variable detail automatic invocation of transistor level timing for...

Method and system for fault-tolerant static timing analysis

Method of partitioning large transistor design to facilitate transi...

Incremental design tuning and decision mediator

Method and apparatus for verifying timing rules for an integrated c...

Parallel hierarchical timing correction

Guess mechanism for virtual address translation

Patents Applicationslast 30 patents

Method and System for Providing Secondary Power Pins in Integrated...

VARIABLE DETAIL AUTOMATIC INVOCATION OF TRANSISTOR LEVEL TIMING FOR...

Method of partitioning large transistor design to facilitate transi...

Method and system for fault-tolerant static timing analysis