Peter Javorka

Person

Radeburg, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Transistor with phase transition material region between channel re...
- Patent number 11,387,364
- Issue date Jul 12, 2022
- GLOBALFOUNDRIES U.S. INC.
- Avinash Lahgere
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FDSOI channel control by implanted high-k buried oxide
- Patent number 10,643,885
- Issue date May 5, 2020
- GLOBALFOUNDRIES Inc.
- Philipp Steinmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional transistor with improved channel mobility
- Patent number 10,340,380
- Issue date Jul 2, 2019
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FDSOI channel control by implanted high-K buried oxide
- Patent number 10,049,917
- Issue date Aug 14, 2018
- GLOBALFOUNDRIES Inc.
- Philipp Steinmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a semiconductor device structure using differing...
- Patent number 9,876,111
- Issue date Jan 23, 2018
- GLOBALFOUNDRIES Inc.
- Steffen Sichler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Performance enhancement in transistors by providing an embedded str...
- Patent number 9,484,459
- Issue date Nov 1, 2016
- GLOBALFOUNDRIES Inc.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a semiconductor device structure and such a semic...
- Patent number 9,472,642
- Issue date Oct 18, 2016
- GLOBALFOUNDRIES Inc.
- Jan Hoentschel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a complex GAA FET device at advanced technology...
- Patent number 9,412,848
- Issue date Aug 9, 2016
- GLOBALFOUNDRIES Inc.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Contact geometry having a gate silicon length decoupled from a tran...
- Patent number 9,412,859
- Issue date Aug 9, 2016
- GLOBALFOUNDRIES Inc.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating integrated circuits with semiconductor subs...
- Patent number 9,406,565
- Issue date Aug 2, 2016
- GLOBALFOUNDRIES, INC.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhancing transistor performance and reliability by incorporating d...
- Patent number 9,401,423
- Issue date Jul 26, 2016
- GLOBALFOUNDRIES Inc.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-gate FETs having corrugated semiconductor stacks and method o...
- Patent number 9,391,176
- Issue date Jul 12, 2016
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional transistor with improved channel mobility
- Patent number 9,373,720
- Issue date Jun 21, 2016
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FINFET doping method with curvilnear trajectory implantation beam path
- Patent number 9,373,509
- Issue date Jun 21, 2016
- GLOBALFOUNDRIES Inc.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective FuSi gate formation in gate first CMOS technologies
- Patent number 9,349,734
- Issue date May 24, 2016
- GLOBALFOUNDRIES Inc.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Efficient main spacer pull back process for advanced VLSI CMOS tech...
- Patent number 9,343,374
- Issue date May 17, 2016
- GLOBALFOUNDRIES Inc.
- Jan Hoentschel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of removing gate cap layers in CMOS applications
- Patent number 9,224,655
- Issue date Dec 29, 2015
- GLOBALFOUNDRIES Inc.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Performance enhancement in transistors by providing an embedded str...
- Patent number 9,224,863
- Issue date Dec 29, 2015
- GLOBALFOUNDRIES Inc.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
HK/MG process flows for P-type semiconductor devices
- Patent number 9,177,803
- Issue date Nov 3, 2015
- GLOBALFOUNDRIES Inc.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated inductor
- Patent number 9,129,843
- Issue date Sep 8, 2015
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods of forming a sidewall spacer having a generally triangular...
- Patent number 9,093,526
- Issue date Jul 28, 2015
- GLOBALFOUNDRIES Inc.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits and methods for fabricating integrated circuits...
- Patent number 9,082,876
- Issue date Jul 14, 2015
- GLOBALFOUNDRIES, INC.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device fabrication methods
- Patent number 9,076,818
- Issue date Jul 7, 2015
- GLOBALFOUNDRIES, INC.
- Andreas Kurz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a semiconductor device and semiconductor device...
- Patent number 9,054,044
- Issue date Jun 9, 2015
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor with embedded Si/Ge material having reduced offset and s...
- Patent number 9,006,835
- Issue date Apr 14, 2015
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduction of defect rates in PFET transistors comprising a Si/Ge se...
- Patent number 8,939,765
- Issue date Jan 27, 2015
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of inducing a desired stress in the channel region of a tra...
- Patent number 8,877,582
- Issue date Nov 4, 2014
- GLOBALFOUNDRIES Inc.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing defect rate during deposition of a channel semiconductor a...
- Patent number 8,836,047
- Issue date Sep 16, 2014
- GLOBALFOUNDRIES Inc.
- Stephan-Detlef Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
PMOS threshold voltage control by germanium implantation
- Patent number 8,828,816
- Issue date Sep 9, 2014
- GLOBALFOUNDRIES Inc.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming metal silicide regions on semiconductor devices...
- Patent number 8,815,736
- Issue date Aug 26, 2014
- GLOBALFOUNDRIES Inc.
- Thilo Scheiper
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
TRANSISTOR WITH PHASE TRANSITION MATERIAL REGION BETWEEN CHANNEL RE...
- Publication number 20220140131
- Publication date May 5, 2022
- GLOBALFOUNDRIES U.S. Inc.
- Avinash Lahgere
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FDSOI CHANNEL CONTROL BY IMPLANTED HIGH-K BURIED OXIDE
- Publication number 20180323099
- Publication date Nov 8, 2018
- GLOBALFOUNDRIES INC.
- Philipp STEINMANN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FDSOI CHANNEL CONTROL BY IMPLANTED HIGH-K BURIED OXIDE
- Publication number 20180082889
- Publication date Mar 22, 2018
- GLOBALFOUNDRIES INC.
- Philipp STEINMANN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
- Publication number 20180053829
- Publication date Feb 22, 2018
- GLOBALFOUNDRIES INC.
- Elliot John Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH-VOLTAGE TRANSISTOR DEVICE
- Publication number 20170338343
- Publication date Nov 23, 2017
- GLOBALFOUNDRIES INC.
- Sylvain Henri Baudot
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE AND SEMICONDUCTO...
- Publication number 20170170317
- Publication date Jun 15, 2017
- GLOBALFOUNDRIES INC.
- Steffen Sichler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT GEOMETRY HAVING A GATE SILICON LENGTH DECOUPLED FROM A TRAN...
- Publication number 20160315162
- Publication date Oct 27, 2016
- GLOBALFOUNDRIES INC.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DENSELY PACKED TRANSISTOR DEVICES
- Publication number 20160300928
- Publication date Oct 13, 2016
- GLOBALFOUNDRIES INC.
- Jan Hoentschel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH-VOLTAGE TRANSISTOR DEVICE
- Publication number 20160276428
- Publication date Sep 22, 2016
- GLOBALFOUNDRIES INC.
- Juergen Faul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL TRANSISTOR WITH IMPROVED CHANNEL MOBILITY
- Publication number 20160268426
- Publication date Sep 15, 2016
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING A COMPLEX GAA FET DEVICE AT ADVANCED TECHNOLOGY...
- Publication number 20160233318
- Publication date Aug 11, 2016
- GLOBALFOUNDRIES INC.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICES WITH FULLY AND PARTIALLY SILICIDED GATE STRUCTURES IN GATE...
- Publication number 20160204217
- Publication date Jul 14, 2016
- GLOBALFOUNDRIES INC.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE AND SUCH A SEMIC...
- Publication number 20160163815
- Publication date Jun 9, 2016
- GLOBALFOUNDRIES INC.
- Jan Hoentschel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EFFICIENT MAIN SPACER PULL BACK PROCESS FOR ADVANCED VLSI CMOS TECH...
- Publication number 20160126146
- Publication date May 5, 2016
- GLOBALFOUNDRIES INC.
- Jan Hoentschel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-GATE FETS HAVING CORRUGATED SEMICONDUCTOR STACKS AND METHOD O...
- Publication number 20160118483
- Publication date Apr 28, 2016
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PERFORMANCE ENHANCEMENT IN TRANSISTORS BY PROVIDING AN EMBEDDED STR...
- Publication number 20160071978
- Publication date Mar 10, 2016
- GLOBALFOUNDRIES INC.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET DOPING METHOD WITH CURVILINEAR TRAJECTORY IMPLANTATION BEAM...
- Publication number 20160071731
- Publication date Mar 10, 2016
- GLOBALFOUNDRIES INC.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVE FuSi GATE FORMATION IN GATE FIRST CMOS TECHNOLOGIES
- Publication number 20160064382
- Publication date Mar 3, 2016
- GLOBALFOUNDRIES INC.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS AND METHODS FOR FABRICATING INTEGRATED CIRCUITS
- Publication number 20160064286
- Publication date Mar 3, 2016
- GLOBALFOUNDRIES, Inc.
- Gabriela Dilliway
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PRODUCT COMPRISED OF MULTIPLE P-TYPE SEMICONDUCT...
- Publication number 20160005734
- Publication date Jan 7, 2016
- GLOBALFOUNDRIES INC.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW LEAKAGE PMOS TRANSISTOR
- Publication number 20150214116
- Publication date Jul 30, 2015
- GLOBALFOUNDRIES INC.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL TRANSISTOR WITH IMPROVED CHANNEL MOBILITY
- Publication number 20150102426
- Publication date Apr 16, 2015
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCING TRANSISTOR PERFORMANCE AND RELIABILITY BY INCORPORATING D...
- Publication number 20150021693
- Publication date Jan 22, 2015
- GLOBALFOUNDRIES INC.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS AND METHODS FOR FABRICATING INTEGRATED CIRCUITS...
- Publication number 20140273367
- Publication date Sep 18, 2014
- GLOBALFOUNDRIES, Inc.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE INCLUDING A TRANSISTOR HAVING A LAYER OF A...
- Publication number 20140264632
- Publication date Sep 18, 2014
- GLOBALFOUNDRIES INC.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HK/MG PROCESS FLOWS FOR P-TYPE SEMICONDUCTOR DEVICES
- Publication number 20140264617
- Publication date Sep 18, 2014
- GLOBALFOUNDRIES INC.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH SEMICONDUCTOR SUBS...
- Publication number 20140273375
- Publication date Sep 18, 2014
- GLOBALFOUNDRIES, Inc.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE...
- Publication number 20140252557
- Publication date Sep 11, 2014
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A SEMICONDUCTOR STRUCTURE INCLUDING AN IMPLANTATI...
- Publication number 20140256137
- Publication date Sep 11, 2014
- GLOBALFOUNDRIES INC.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT GEOMETRY HAVING A GATE SILICON LENGTH DECOUPLED FROM A TRAN...
- Publication number 20140252429
- Publication date Sep 11, 2014
- GLOBALFOUNDRIES INC.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS

Peter Javorka

Person

Patents Grantslast 30 patents

Transistor with phase transition material region between channel re...

FDSOI channel control by implanted high-k buried oxide

Three-dimensional transistor with improved channel mobility

FDSOI channel control by implanted high-K buried oxide

Method of forming a semiconductor device structure using differing...

Performance enhancement in transistors by providing an embedded str...

Method of forming a semiconductor device structure and such a semic...

Methods of forming a complex GAA FET device at advanced technology...

Contact geometry having a gate silicon length decoupled from a tran...

Methods for fabricating integrated circuits with semiconductor subs...

Enhancing transistor performance and reliability by incorporating d...

Multi-gate FETs having corrugated semiconductor stacks and method o...

Three-dimensional transistor with improved channel mobility

FINFET doping method with curvilnear trajectory implantation beam path

Selective FuSi gate formation in gate first CMOS technologies

Efficient main spacer pull back process for advanced VLSI CMOS tech...

Methods of removing gate cap layers in CMOS applications

Performance enhancement in transistors by providing an embedded str...

HK/MG process flows for P-type semiconductor devices

Integrated inductor

Methods of forming a sidewall spacer having a generally triangular...

Integrated circuits and methods for fabricating integrated circuits...

Semiconductor device fabrication methods

Method for forming a semiconductor device and semiconductor device...

Transistor with embedded Si/Ge material having reduced offset and s...

Reduction of defect rates in PFET transistors comprising a Si/Ge se...

Methods of inducing a desired stress in the channel region of a tra...

Reducing defect rate during deposition of a channel semiconductor a...

PMOS threshold voltage control by germanium implantation

Methods of forming metal silicide regions on semiconductor devices...

Patents Applicationslast 30 patents

TRANSISTOR WITH PHASE TRANSITION MATERIAL REGION BETWEEN CHANNEL RE...

FDSOI CHANNEL CONTROL BY IMPLANTED HIGH-K BURIED OXIDE

FDSOI CHANNEL CONTROL BY IMPLANTED HIGH-K BURIED OXIDE

METHOD OF FORMING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE

HIGH-VOLTAGE TRANSISTOR DEVICE

METHOD OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE AND SEMICONDUCTO...

CONTACT GEOMETRY HAVING A GATE SILICON LENGTH DECOUPLED FROM A TRAN...

DENSELY PACKED TRANSISTOR DEVICES

HIGH-VOLTAGE TRANSISTOR DEVICE

THREE-DIMENSIONAL TRANSISTOR WITH IMPROVED CHANNEL MOBILITY

METHODS OF FORMING A COMPLEX GAA FET DEVICE AT ADVANCED TECHNOLOGY...

DEVICES WITH FULLY AND PARTIALLY SILICIDED GATE STRUCTURES IN GATE...

METHOD OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE AND SUCH A SEMIC...

EFFICIENT MAIN SPACER PULL BACK PROCESS FOR ADVANCED VLSI CMOS TECH...

MULTI-GATE FETS HAVING CORRUGATED SEMICONDUCTOR STACKS AND METHOD O...

PERFORMANCE ENHANCEMENT IN TRANSISTORS BY PROVIDING AN EMBEDDED STR...

FINFET DOPING METHOD WITH CURVILINEAR TRAJECTORY IMPLANTATION BEAM...

SELECTIVE FuSi GATE FORMATION IN GATE FIRST CMOS TECHNOLOGIES

INTEGRATED CIRCUITS AND METHODS FOR FABRICATING INTEGRATED CIRCUITS

INTEGRATED CIRCUIT PRODUCT COMPRISED OF MULTIPLE P-TYPE SEMICONDUCT...

LOW LEAKAGE PMOS TRANSISTOR

THREE-DIMENSIONAL TRANSISTOR WITH IMPROVED CHANNEL MOBILITY

ENHANCING TRANSISTOR PERFORMANCE AND RELIABILITY BY INCORPORATING D...

INTEGRATED CIRCUITS AND METHODS FOR FABRICATING INTEGRATED CIRCUITS...

SEMICONDUCTOR STRUCTURE INCLUDING A TRANSISTOR HAVING A LAYER OF A...

HK/MG PROCESS FLOWS FOR P-TYPE SEMICONDUCTOR DEVICES

METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH SEMICONDUCTOR SUBS...

METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE...

METHOD OF FORMING A SEMICONDUCTOR STRUCTURE INCLUDING AN IMPLANTATI...

CONTACT GEOMETRY HAVING A GATE SILICON LENGTH DECOUPLED FROM A TRAN...