Peter McElheny

Person

Morgan Hill, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Active interposer for localized programmable integrated circuit rec...
- Patent number 11,784,794
- Issue date Oct 10, 2023
- Intel Corporation
- Peter John McElheny
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Active interposer for localized programmable integrated circuit rec...
- Patent number 10,778,414
- Issue date Sep 15, 2020
- Intel Corporation
- Peter John McElheny
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Active interposer for localized programmable integrated circuit rec...
- Patent number 10,291,397
- Issue date May 14, 2019
- Intel Corporation
- Peter John McElheny
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Strain-enhanced transistors with adjustable layouts
- Patent number 9,634,094
- Issue date Apr 25, 2017
- Altera Corporation
- Girish Venkitachalam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiport memory element circuitry
- Patent number 9,576,617
- Issue date Feb 21, 2017
- Altera Corporation
- Shih-Lin S. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit and a method to optimize strain inducing composites
- Patent number 9,484,411
- Issue date Nov 1, 2016
- Altera Corporation
- Girish Venkitachalam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with asymmetric transistors
- Patent number 8,995,177
- Issue date Mar 31, 2015
- Altera Corporation
- Shankar Sinha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit and a method to optimize strain inducing composites
- Patent number 8,765,541
- Issue date Jul 1, 2014
- Altera Corporation
- Girish Venkitachalam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiport memory element circuitry
- Patent number 8,755,218
- Issue date Jun 17, 2014
- Altera Corporation
- Shih-Lin S. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Strain enhanced transistors with adjustable layouts
- Patent number 8,664,725
- Issue date Mar 4, 2014
- Altera Corporation
- Girish Venkitachalam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with asymmetric transistors
- Patent number 8,638,594
- Issue date Jan 28, 2014
- Altera Corporation
- Shankar Sinha
- G11 - INFORMATION STORAGE
Information Patent Grant
Automated verification of transformational operations on a photomas...
- Patent number 8,627,264
- Issue date Jan 7, 2014
- Altera Corporation
- Girish Venkitachalam
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Electrical fuse with sacrificial contact
- Patent number 8,492,798
- Issue date Jul 23, 2013
- Altera Corporation
- Shih-Lin S. Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and methods for adjusting performance of integrated circuits
- Patent number 8,138,786
- Issue date Mar 20, 2012
- Altera Corporation
- David Lewis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Non-volatile memory circuit including voltage divider with phase ch...
- Patent number 8,130,538
- Issue date Mar 6, 2012
- Altera Corporation
- Peter J. McElheny
- G11 - INFORMATION STORAGE
Information Patent Grant
Photolithographic reticles with electrostatic discharge protection...
- Patent number 8,057,964
- Issue date Nov 15, 2011
- Altera Corporation
- Che Ta Hsu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Integrated circuit well isolation structures
- Patent number 7,902,611
- Issue date Mar 8, 2011
- Altera Corporation
- Irfan Rahim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with metal-oxide-semiconductor transistors havi...
- Patent number 7,812,408
- Issue date Oct 12, 2010
- Altera Corporation
- Albert Ratnakumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical fuse with sacrificial contact
- Patent number 7,759,226
- Issue date Jul 20, 2010
- Altera Corporation
- Shih-Lin S. Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit bond pad structures
- Patent number 7,741,716
- Issue date Jun 22, 2010
- Altera Corporation
- Girish Venkitachalam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
On-chip voltage regulator using feedback on process/product parameters
- Patent number 7,639,033
- Issue date Dec 29, 2009
- Altera Corporation
- Irfan Rahim
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and methods for adjusting performance of integrated circuits
- Patent number 7,573,317
- Issue date Aug 11, 2009
- Altera Corporation
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-oxide transistors for the improvement of reliability and off-s...
- Patent number 7,514,758
- Issue date Apr 7, 2009
- Altera Corporation
- Peter John McElheny
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and methods for adjusting performance of programmable log...
- Patent number 7,348,827
- Issue date Mar 25, 2008
- Altera Corporation
- Irfan Rahim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for hard failure repairs in the field
- Patent number 7,277,346
- Issue date Oct 2, 2007
- Altera Corporation
- Irfan Rahim
- G11 - INFORMATION STORAGE
Information Patent Grant
Local control of electrical and mechanical properties of copper int...
- Patent number 7,235,884
- Issue date Jun 26, 2007
- Altera Corporation
- Peter John McElheny
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
On-chip voltage regulator using feedback on process/product parameters
- Patent number 7,170,308
- Issue date Jan 30, 2007
- Altera Corporation
- Irfan Rahim
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and methods for adjusting performance of integrated circuits
- Patent number 7,129,745
- Issue date Oct 31, 2006
- Altera Corporation
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for implementing electro-static discharge protection in sili...
- Patent number 7,125,760
- Issue date Oct 24, 2006
- Altera Corporation
- Dirk Alan Reese
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable logic device design tools with gate leakage reduction...
- Patent number 7,107,566
- Issue date Sep 12, 2006
- Altera Corporation
- Peter John McElheny
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ACTIVE INTERPOSER FOR LOCALIZED PROGRAMMABLE INTEGRATED CIRCUIT REC...
- Publication number 20200374102
- Publication date Nov 26, 2020
- Intel Corporation
- Peter John McElheny
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ACTIVE INTERPOSER FOR LOCALIZED PROGRAMMABLE INTEGRATED CIRCUIT REC...
- Publication number 20190229888
- Publication date Jul 25, 2019
- Intel Corporation
- Peter John McElheny
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ACTIVE INTERPOSER FOR LOCALIZED PROGRAMMABLE INTEGRATED CIRCUIT REC...
- Publication number 20180176006
- Publication date Jun 21, 2018
- Intel Corporation
- Peter John McElheny
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PARALLEL CONFIGURED RESISTIVE MEMORY ELEMENTS
- Publication number 20170365643
- Publication date Dec 21, 2017
- Altera Corporation
- Peter John McElheny
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH PERFORMANCE FINFET
- Publication number 20150206965
- Publication date Jul 23, 2015
- Altera Corporation
- Ning Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPORT MEMORY ELEMENT CIRCUITRY
- Publication number 20120311401
- Publication date Dec 6, 2012
- Shih-Lin S. Lee
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY CIRCUIT INCLUDING VOLTAGE DIVIDER WITH PHASE CH...
- Publication number 20100177560
- Publication date Jul 15, 2010
- Altera Corporation
- Peter J. McElheny
- G11 - INFORMATION STORAGE
Information Patent Application
PHOTOLITHOGRAPHIC RETICLES WITH ELECTROSTATIC DISCHARGE PROTECTION...
- Publication number 20100112461
- Publication date May 6, 2010
- Che Ta Hsu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Apparatus and Methods for Adjusting Performance of Integrated Circuits
- Publication number 20090289696
- Publication date Nov 26, 2009
- Altera Corporation
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Methods for Adjusting Performance of Programmable Log...
- Publication number 20080164936
- Publication date Jul 10, 2008
- Altera Corporation
- Irfan Rahim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Double exposure photolithographic process
- Publication number 20070243492
- Publication date Oct 18, 2007
- Peter J. McElheny
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
On-chip voltage regulator using feedback on process/product parameters
- Publication number 20070085558
- Publication date Apr 19, 2007
- Irfan Rahim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUS AND METHODS FOR ADJUSTING PERFORMANCE OF INTEGRATED CIRCUITS
- Publication number 20070069764
- Publication date Mar 29, 2007
- Altera Corporation
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and methods for adjusting performance of integrated circuits
- Publication number 20050280437
- Publication date Dec 22, 2005
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and methods for adjusting performance of programmable log...
- Publication number 20050258862
- Publication date Nov 24, 2005
- Irfan Rahim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dual-oxide transistors for the improvement of reliability and off-s...
- Publication number 20050224840
- Publication date Oct 13, 2005
- Altera Corporation
- Peter John McElheny
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Polysilicon gate doping level variation for reduced leakage current
- Publication number 20050003601
- Publication date Jan 6, 2005
- Peter McElheny
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POLYSILICON GATE DOPING LEVEL VARIATION FOR REDUCED LEAKAGE CURRENT
- Publication number 20040097043
- Publication date May 20, 2004
- Peter McElheny
- H01 - BASIC ELECTRIC ELEMENTS

Peter McElheny

Person

Patents Grantslast 30 patents

Active interposer for localized programmable integrated circuit rec...

Active interposer for localized programmable integrated circuit rec...

Active interposer for localized programmable integrated circuit rec...

Strain-enhanced transistors with adjustable layouts

Multiport memory element circuitry

Integrated circuit and a method to optimize strain inducing composites

Integrated circuits with asymmetric transistors

Integrated circuit and a method to optimize strain inducing composites

Multiport memory element circuitry

Strain enhanced transistors with adjustable layouts

Integrated circuits with asymmetric transistors

Automated verification of transformational operations on a photomas...

Electrical fuse with sacrificial contact

Apparatus and methods for adjusting performance of integrated circuits

Non-volatile memory circuit including voltage divider with phase ch...

Photolithographic reticles with electrostatic discharge protection...

Integrated circuit well isolation structures

Integrated circuits with metal-oxide-semiconductor transistors havi...

Electrical fuse with sacrificial contact

Integrated circuit bond pad structures

On-chip voltage regulator using feedback on process/product parameters

Apparatus and methods for adjusting performance of integrated circuits

Dual-oxide transistors for the improvement of reliability and off-s...

Apparatus and methods for adjusting performance of programmable log...

Method and system for hard failure repairs in the field

Local control of electrical and mechanical properties of copper int...

On-chip voltage regulator using feedback on process/product parameters

Apparatus and methods for adjusting performance of integrated circuits

Method for implementing electro-static discharge protection in sili...

Programmable logic device design tools with gate leakage reduction...

Patents Applicationslast 30 patents

ACTIVE INTERPOSER FOR LOCALIZED PROGRAMMABLE INTEGRATED CIRCUIT REC...

ACTIVE INTERPOSER FOR LOCALIZED PROGRAMMABLE INTEGRATED CIRCUIT REC...

ACTIVE INTERPOSER FOR LOCALIZED PROGRAMMABLE INTEGRATED CIRCUIT REC...

PARALLEL CONFIGURED RESISTIVE MEMORY ELEMENTS

HIGH PERFORMANCE FINFET

MULTIPORT MEMORY ELEMENT CIRCUITRY

NON-VOLATILE MEMORY CIRCUIT INCLUDING VOLTAGE DIVIDER WITH PHASE CH...

PHOTOLITHOGRAPHIC RETICLES WITH ELECTROSTATIC DISCHARGE PROTECTION...

Apparatus and Methods for Adjusting Performance of Integrated Circuits

Apparatus and Methods for Adjusting Performance of Programmable Log...

Double exposure photolithographic process

On-chip voltage regulator using feedback on process/product parameters

APPARATUS AND METHODS FOR ADJUSTING PERFORMANCE OF INTEGRATED CIRCUITS

Apparatus and methods for adjusting performance of integrated circuits

Apparatus and methods for adjusting performance of programmable log...

Dual-oxide transistors for the improvement of reliability and off-s...

Polysilicon gate doping level variation for reduced leakage current

POLYSILICON GATE DOPING LEVEL VARIATION FOR REDUCED LEAKAGE CURRENT