Philip M. Freidin

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dispense verification meters
- Patent number 8,467,900
- Issue date Jun 18, 2013
- Malema Engineering Corporation
- Philip M. Freidin
- G01 - MEASURING TESTING
Information Patent Grant
Dispense verification meters
- Patent number 8,185,237
- Issue date May 22, 2012
- Malema Engineering Corporation
- Philip M. Freidin
- G01 - MEASURING TESTING
Information Patent Grant
High speed configurable transceiver architecture
- Patent number 7,187,709
- Issue date Mar 6, 2007
- Xilinx, Inc.
- Suresh M. Menon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network physical layer with embedded multi-standard CRC generator
- Patent number 7,111,220
- Issue date Sep 19, 2006
- Xilinx, Inc.
- Paul T. Sasaki
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Correlator method and apparatus
- Patent number 6,237,014
- Issue date May 22, 2001
- GE Capital Spacenet Services, Inc.
- Philip Manuel Freidin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Correlator method and apparatus
- Patent number 6,148,313
- Issue date Nov 14, 2000
- GE Capital Spacenet Services, Inc.
- Philip Manuel Freidin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable parallel and bit serial load apparatus
- Patent number 5,995,988
- Issue date Nov 30, 1999
- Xilinx, Inc.
- Philip M. Freidin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable parallel and bit serial load apparatus
- Patent number 5,961,576
- Issue date Oct 5, 1999
- Xilinx, Inc.
- Philip M. Freidin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable parallel and bit serial load apparatus
- Patent number 5,844,829
- Issue date Dec 1, 1998
- Xilinx, Inc.
- Philip M. Freidin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable parallel and bit serial load apparatus
- Patent number 5,742,531
- Issue date Apr 21, 1998
- Philip M. Freidin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Virtual high density programmable integrated circuit having address...
- Patent number 5,726,584
- Issue date Mar 10, 1998
- Xilinx, Inc.
- Philip M. Freidin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for providing multiple function symbols
- Patent number 5,661,660
- Issue date Aug 26, 1997
- Xilinx, Inc.
- Philip M. Freidin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase-locked delay loop for clock correction
- Patent number 5,646,564
- Issue date Jul 8, 1997
- Xilinx, Inc.
- Charles R. Erickson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronous dual port RAM
- Patent number 5,631,577
- Issue date May 20, 1997
- Xilinx, Inc.
- Philip M. Freidin
- G11 - INFORMATION STORAGE
Information Patent Grant
Error detection structure and method for serial or parallel data st...
- Patent number 5,598,424
- Issue date Jan 28, 1997
- Xilinx, Inc.
- Charles R. Erickson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronous dual port ram
- Patent number 5,566,123
- Issue date Oct 15, 1996
- Xilinx, Inc.
- Philip M. Freidin
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable sequencher having internal components which are microp...
- Patent number 5,553,301
- Issue date Sep 3, 1996
- Advanced Micro Devices, Inc.
- Bernard J. New
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic block with look-up table for configuration and memory
- Patent number 5,414,377
- Issue date May 9, 1995
- Xilinx, Inc.
- Philip M. Freidin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Asynchronous or synchronous load multifunction flip-flop
- Patent number 5,410,194
- Issue date Apr 25, 1995
- Xilinx, Inc.
- Philip M. Freidin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error detection structure and method using partial polynomial check
- Patent number 5,321,704
- Issue date Jun 14, 1994
- Xilinx, Inc.
- Charles R. Erickson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Universal microprocessor interface circuit
- Patent number 4,967,346
- Issue date Oct 30, 1990
- Advanced Micro Devices, Inc.
- Philip Freidin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Diagnostic circiut for digital systems
- Patent number 4,935,929
- Issue date Jun 19, 1990
- Advanced Micro Devices, Inc.
- Steven B. Sidman
- G01 - MEASURING TESTING
Information Patent Grant
Methods and apparatus for optimizing instruction processing in comp...
- Patent number 4,933,837
- Issue date Jun 12, 1990
- Advanced Micro Devices, Inc.
- Philip Freidin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Streamlined instruction processor
- Patent number 4,926,323
- Issue date May 15, 1990
- Advanced Micro Devices, Inc.
- Gigy Baror
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible, reconfigurable terminal pin
- Patent number 4,835,414
- Issue date May 30, 1989
- Advanced Micro Devices, Inc.
- Philip Freidin
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Dispense Verification Meters
- Publication number 20120211518
- Publication date Aug 23, 2012
- Malema Engineering Corporation
- Philip M. Freidin
- G01 - MEASURING TESTING
Information Patent Application
Dispense Verification Meters
- Publication number 20090171502
- Publication date Jul 2, 2009
- Malema Engineering Corporation
- Philip M. Freidin
- G01 - MEASURING TESTING
Information Patent Application
System for wireless local display of measurement data from electron...
- Publication number 20060162178
- Publication date Jul 27, 2006
- Philip Manuel Freidin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Philip M. Freidin

Person

Patents Grantslast 30 patents

Dispense verification meters

Dispense verification meters

High speed configurable transceiver architecture

Network physical layer with embedded multi-standard CRC generator

Correlator method and apparatus

Correlator method and apparatus

Configurable parallel and bit serial load apparatus

Configurable parallel and bit serial load apparatus

Configurable parallel and bit serial load apparatus

Configurable parallel and bit serial load apparatus

Virtual high density programmable integrated circuit having address...

Method for providing multiple function symbols

Phase-locked delay loop for clock correction

Synchronous dual port RAM

Error detection structure and method for serial or parallel data st...

Synchronous dual port ram

Programmable sequencher having internal components which are microp...

Logic block with look-up table for configuration and memory

Asynchronous or synchronous load multifunction flip-flop

Error detection structure and method using partial polynomial check

Universal microprocessor interface circuit

Diagnostic circiut for digital systems

Methods and apparatus for optimizing instruction processing in comp...

Streamlined instruction processor

Flexible, reconfigurable terminal pin

Patents Applicationslast 30 patents

Dispense Verification Meters

Dispense Verification Meters

System for wireless local display of measurement data from electron...