Philippe Gayet

Person

Saint Vincent de Mercuze, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Process for fabricating an electrical circuit comprising a polishin...
- Patent number 7,064,053
- Issue date Jun 20, 2006
- STMicroelectronics S.A.
- Srdjan Kordic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with stop layer and associated fabrication process
- Patent number 6,762,497
- Issue date Jul 13, 2004
- STMicroelectronics S.A.
- Philippe Gayet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for producing a resistor in an integrated circuit and corre...
- Patent number 6,580,130
- Issue date Jun 17, 2003
- STMicroelectronics S.A.
- Jean-Pierre Schoellkopf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor substrate having an isolation region
- Patent number 6,525,393
- Issue date Feb 25, 2003
- SGS-Thomson Microelectronics S.A.
- Philippe Gayet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming insulated metal interconnections in integrated ci...
- Patent number 6,451,669
- Issue date Sep 17, 2002
- STMicroelectronics S.A.
- Joaquim Torres
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit and associated fabrication process
- Patent number 6,392,299
- Issue date May 21, 2002
- STMicroelectronics S.A.
- Philippe Gayet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with stop layer and associated fabrication process
- Patent number 6,355,552
- Issue date Mar 12, 2002
- STMicroelectronics S.A.
- Philippe Gayet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High aspect ratio contact structure for use in integrated circuits
- Patent number 6,239,025
- Issue date May 29, 2001
- SGS-Thomson Microelectronics S.A.
- Gordon Bease
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming planar isolation in integrated circuits
- Patent number 5,736,451
- Issue date Apr 7, 1998
- SGS-Thomson Microelectronics S.A.
- Philippe Gayet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for determining the complete elimination of a thin layer on...
- Patent number 5,186,786
- Issue date Feb 16, 1993
- France Telecom (CNET)
- Jean Galvier
- B24 - GRINDING POLISHING

Patents Applicationslast 30 patents

Information Patent Application
Process for fabricating an electrical circuit comprising a polishin...
- Publication number 20040087140
- Publication date May 6, 2004
- Srdjan Kordic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit with stop layer and associated fabrication process
- Publication number 20020079589
- Publication date Jun 27, 2002
- STMicroelectronics S.A.
- Philippe Gayet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming insulated metal interconnections in integrated ci...
- Publication number 20010036723
- Publication date Nov 1, 2001
- Joaquim Torres
- H01 - BASIC ELECTRIC ELEMENTS

Philippe Gayet

Person

Patents Grantslast 30 patents

Process for fabricating an electrical circuit comprising a polishin...

Integrated circuit with stop layer and associated fabrication process

Process for producing a resistor in an integrated circuit and corre...

Semiconductor substrate having an isolation region

Method of forming insulated metal interconnections in integrated ci...

Integrated circuit and associated fabrication process

Integrated circuit with stop layer and associated fabrication process

High aspect ratio contact structure for use in integrated circuits

Method of forming planar isolation in integrated circuits

Method for determining the complete elimination of a thin layer on...

Patents Applicationslast 30 patents

Process for fabricating an electrical circuit comprising a polishin...

Integrated circuit with stop layer and associated fabrication process

Method of forming insulated metal interconnections in integrated ci...