Philippe Hauviller

Person

Itteville, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Characterizing jitter sensitivity of a serializer/deserializer circuit
- Patent number 7,543,209
- Issue date Jun 2, 2009
- International Business Machines Corporation
- Dominique P Bonneau
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Serializer/deserializer circuit for jitter sensitivity characteriza...
- Patent number 7,533,317
- Issue date May 12, 2009
- International Business Machines Corporation
- Dominique P Bonneau
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Serializer/deserializer circuit for jitter sensitivity characteriza...
- Patent number 7,251,764
- Issue date Jul 31, 2007
- International Business Machines Corporation
- Dominique P. Bonneau
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transition detection, validation and memorization circuit
- Patent number 7,180,966
- Issue date Feb 20, 2007
- International Business Machines Corporation
- Vincent Vallet
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receiver having full signal path differential offset cancellation c...
- Patent number 7,180,354
- Issue date Feb 20, 2007
- International Business Machines Corporation
- Bertrand Gabillard
- G11 - INFORMATION STORAGE
Information Patent Grant
Sample selection and data alignment circuit
- Patent number 7,136,443
- Issue date Nov 14, 2006
- International Business Machines Corporation
- Vincent Vallet
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Differential sampling circuit for generating a differential input s...
- Patent number 6,946,986
- Issue date Sep 20, 2005
- International Business Machines Corporation
- Bertrand Gabillard
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self test system and method for high speed clock and data...
- Patent number 6,834,367
- Issue date Dec 21, 2004
- International Business Machines Corporation
- Dominique P. Bonneau
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Device for extending the resolution of a N-bit resistive digital-to...
- Patent number 4,918,448
- Issue date Apr 17, 1990
- International Business Machines Corporation
- Philippe Hauviller
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF CHECKING THE LAYOUT INTEGRITY
- Publication number 20150347667
- Publication date Dec 3, 2015
- International Business Machines Corporation
- John J. Ellis-Monaghan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Very High Speed Low Power Receiver Equalization System For Non-Retu...
- Publication number 20080279271
- Publication date Nov 13, 2008
- Philippe Hauviller
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ESD POWER CLAMP IN TRIPLE WELL
- Publication number 20080029824
- Publication date Feb 7, 2008
- International Business Machines Corporation
- Arnold E. Baizley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SERIALIZER/DESERIALIZER CIRCUIT FOR JITTER SENSITIVITY CHARACTERIZA...
- Publication number 20070277069
- Publication date Nov 29, 2007
- Dominique P. Bonneau
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Serializer/deserializer circuit for jitter sensitivity characteriza...
- Publication number 20070088998
- Publication date Apr 19, 2007
- Dominique P. Bonneau
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
AN IMPROVED RECEIVER HAVING FULL SIGNAL PATH DIFFERENTIAL OFFSET CA...
- Publication number 20050212564
- Publication date Sep 29, 2005
- International Business Machines Corporation
- Bertrand Gabillard
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
IMPROVEMENTS TO DATA RECOVERY CIRCUITS USING OVERSAMPLING FOR ISI C...
- Publication number 20050135518
- Publication date Jun 23, 2005
- International Business Machines Corporation
- Vincent Vallet
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SERIALIZER/DESERIALIZER CIRCUIT FOR JITTER SENSITIVITY CHARACTERIZA...
- Publication number 20040243899
- Publication date Dec 2, 2004
- International Business Machines Corporation
- Dominique P. Bonneau
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Differential sampling circuit for generating a differential input s...
- Publication number 20040130468
- Publication date Jul 8, 2004
- International Business Machines Corporation
- Bertrand Gabillard
- G11 - INFORMATION STORAGE
Information Patent Application
Sample selection and data alignment circuit
- Publication number 20030095619
- Publication date May 22, 2003
- International Business Machines Corporation
- Vincent Vallet
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Transition detection, validation and memorization circuit
- Publication number 20030091137
- Publication date May 15, 2003
- International Business Machines Corporation
- Vincent Vallet
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Built-in self test system and method for high speed clock and data...
- Publication number 20010016929
- Publication date Aug 23, 2001
- International Business Machines Corporation
- Dominique P. Bonneau
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Philippe Hauviller

Person

Patents Grantslast 30 patents

Characterizing jitter sensitivity of a serializer/deserializer circuit

Serializer/deserializer circuit for jitter sensitivity characteriza...

Serializer/deserializer circuit for jitter sensitivity characteriza...

Transition detection, validation and memorization circuit

Receiver having full signal path differential offset cancellation c...

Sample selection and data alignment circuit

Differential sampling circuit for generating a differential input s...

Built-in self test system and method for high speed clock and data...

Device for extending the resolution of a N-bit resistive digital-to...

Patents Applicationslast 30 patents

METHOD OF CHECKING THE LAYOUT INTEGRITY

Very High Speed Low Power Receiver Equalization System For Non-Retu...

ESD POWER CLAMP IN TRIPLE WELL

SERIALIZER/DESERIALIZER CIRCUIT FOR JITTER SENSITIVITY CHARACTERIZA...

Serializer/deserializer circuit for jitter sensitivity characteriza...

AN IMPROVED RECEIVER HAVING FULL SIGNAL PATH DIFFERENTIAL OFFSET CA...

IMPROVEMENTS TO DATA RECOVERY CIRCUITS USING OVERSAMPLING FOR ISI C...

SERIALIZER/DESERIALIZER CIRCUIT FOR JITTER SENSITIVITY CHARACTERIZA...

Differential sampling circuit for generating a differential input s...

Sample selection and data alignment circuit

Transition detection, validation and memorization circuit

Built-in self test system and method for high speed clock and data...