Rabindra N. Das

Person

Vestal, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Electrically conductive adhesive (ECA) for multilayer device interc...
- Patent number 9,451,693
- Issue date Sep 20, 2016
- i3 ELECTRONICS, INC.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of making a circuitized substrate
- Patent number 9,420,689
- Issue date Aug 16, 2016
- i3 Electronics, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Coreless layer buildup structure with LGA and joining layer
- Patent number 9,351,408
- Issue date May 24, 2016
- i3 ELECTRONICS, INC.
- Voya Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Conducting paste for device level interconnects
- Patent number 8,685,284
- Issue date Apr 1, 2014
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Substrate having internal capacitor and method of making same
- Patent number 8,607,445
- Issue date Dec 17, 2013
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Solder and electrically conductive adhesive based interconnection f...
- Patent number 8,592,299
- Issue date Nov 26, 2013
- Endicott Interconnect Technologies, Inc.
- Voya R. Markovich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic package with thermal interposer and method of making same
- Patent number 8,558,374
- Issue date Oct 15, 2013
- Endicott Interconnect Technologies, Inc.
- Voya R. Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Coreless layer buildup structure
- Patent number 8,541,687
- Issue date Sep 24, 2013
- Endicott Interconnect Technologies, Inc.
- Voya Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Coreless layer buildup structure with LGA
- Patent number 8,536,459
- Issue date Sep 17, 2013
- Endicott Interconnect Technologies, Inc.
- Voya Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of forming an electrically conductive printed line
- Patent number 8,499,445
- Issue date Aug 6, 2013
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of forming multilayer capacitors in a printed circuit substrate
- Patent number 8,501,575
- Issue date Aug 6, 2013
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Circuitized substrate with low loss capacitive material and method...
- Patent number 8,446,707
- Issue date May 21, 2013
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Circuitized substrate with dielectric interposer assembly and method
- Patent number 8,299,371
- Issue date Oct 30, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Anti-tamper microchip package based on thermal nanofluids or fluids
- Patent number 8,288,857
- Issue date Oct 16, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making circuitized substrate with resistor including mate...
- Patent number 8,247,703
- Issue date Aug 21, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of joining a semiconductor device/chip to a printed wiring b...
- Patent number 8,240,031
- Issue date Aug 14, 2012
- Endicott International Technologies, Inc.
- Voya R. Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multi-layer embedded capacitance and resistance substrate core
- Patent number 8,144,480
- Issue date Mar 27, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Liquid crystal polymer layer for encapsulation and improved hermiti...
- Patent number 8,143,530
- Issue date Mar 27, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- B32 - LAYERED PRODUCTS
Information Patent Grant
Circuitized substrate with conductive paste, electrical assembly in...
- Patent number 8,063,315
- Issue date Nov 22, 2011
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Capacitive substrate
- Patent number 7,897,877
- Issue date Mar 1, 2011
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of making circuitized substrate with a resistor
- Patent number 7,870,664
- Issue date Jan 18, 2011
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Capacitive substrate and method of making same
- Patent number 7,803,688
- Issue date Sep 28, 2010
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multi-layer embedded capacitance and resistance substrate core
- Patent number 7,791,897
- Issue date Sep 7, 2010
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Circuitized substrate with internal resistor, method of making said...
- Patent number 7,687,724
- Issue date Mar 30, 2010
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Capacitor material for use in circuitized substrates, circuitized s...
- Patent number 7,541,265
- Issue date Jun 2, 2009
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of making a capacitive substrate for use as part of a larger...
- Patent number 7,449,381
- Issue date Nov 11, 2008
- Endicott Interconect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Circuitized substrate with solder-coated microparticle paste connec...
- Patent number 7,442,879
- Issue date Oct 28, 2008
- Endicott Interconect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of making a capacitive substrate using photoimageable dielec...
- Patent number 7,429,510
- Issue date Sep 30, 2008
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of making an internal capacitive substrate for use in a circ...
- Patent number 7,384,856
- Issue date Jun 10, 2008
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Resistor material with metal component for use in circuitized subst...
- Patent number 7,235,745
- Issue date Jun 26, 2007
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
ELECTRICALLY CONDUCTIVE ADHESIVE (ECA) FOR MULTILAYER DEVICE INTERC...
- Publication number 20130033827
- Publication date Feb 7, 2013
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
CONDUCTIVE METAL MICRO-PILLARS FOR ENHANCED ELECTRICAL INTERCONNECTION
- Publication number 20120257343
- Publication date Oct 11, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CONDUCTIVE METAL NUB FOR ENHANCED ELECTRICAL INTERCONNECTION, AND I...
- Publication number 20120243155
- Publication date Sep 27, 2012
- Endicott Interconnect Technologies, Inc.
- Luis J. Matienzo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUITIZED SUBSTRATE WITH INTERNAL THIN FILM CAPACITOR AND METHOD...
- Publication number 20120228014
- Publication date Sep 13, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHOD OF FORMING MULTILAYER CAPACITORS IN A PRINTED CIRCUIT SUBSTRATE
- Publication number 20120223047
- Publication date Sep 6, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
ELECTRONIC PACKAGE WITH THERMAL INTERPOSER AND METHOD OF MAKING SAME
- Publication number 20120201006
- Publication date Aug 9, 2012
- Endicott Interconnect Technologies, Inc.
- Voya R. Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CORELESS LAYER BUILDUP STRUCTURE
- Publication number 20120160547
- Publication date Jun 28, 2012
- Endicott Interconnect Technologies, Inc.
- Timothy Antesberger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CORELESS LAYER BUILDUP STRUCTURE WITH LGA
- Publication number 20120160544
- Publication date Jun 28, 2012
- Endicott Interconnect Technologies, Inc.
- Timothy Antesberger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
ELECTRONIC PACKAGE AND METHOD OF MAKING SAME
- Publication number 20120162928
- Publication date Jun 28, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CIRCUITIZED SUBSTRATE WITH DIELECTRIC INTERPOSER ASSEMBLY AND METHOD
- Publication number 20120152605
- Publication date Jun 21, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
LIQUID CRYSTAL POLYMER LAYER FOR ENCAPSULATION AND IMPROVED HERMITI...
- Publication number 20120069288
- Publication date Mar 22, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra Das
- B32 - LAYERED PRODUCTS
Information Patent Application
CONDUCTING PASTE FOR DEVICE LEVEL INTERCONNECTS
- Publication number 20120069531
- Publication date Mar 22, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ANTI-TAMPER MICROCHIP PACKAGE BASED ON THERMAL NANOFLUIDS OR FLUIDS
- Publication number 20120068326
- Publication date Mar 22, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CORELESS LAYER BUILDUP STRUCTURE WITH LGA AND JOINING LAYER
- Publication number 20120031649
- Publication date Feb 9, 2012
- Endicott Interconnect Technologies, Inc.
- Timothy Antesberger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CIRCUITIZED SUBSTRATE WITH CONDUCTIVE PASTE, ELECTRICAL ASSEMBLY IN...
- Publication number 20120017437
- Publication date Jan 26, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
HIGH DENSITY DECAL AND METHOD FOR ATTACHING SAME
- Publication number 20120015532
- Publication date Jan 19, 2012
- Endicott Interconnect Technologies, Inc.
- Voya R. Markovich
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
METHOD OF MAKING CIRCUITIZED SUBSTRATE WITH RESISTOR INCLUDING MATE...
- Publication number 20110043987
- Publication date Feb 24, 2011
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Circuitized substrate with internal resistor, method of making said...
- Publication number 20110039212
- Publication date Feb 17, 2011
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
MULTI-LAYER EMBEDDED CAPACITANCE AND RESISTANCE SUBSTRATE CORE
- Publication number 20100167210
- Publication date Jul 1, 2010
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Mulit-layer embedded capacitance and resistance substrate core
- Publication number 20100060381
- Publication date Mar 11, 2010
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Capacitive substrate and method of making same
- Publication number 20090206051
- Publication date Aug 20, 2009
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method of making a circuitized substrate having at least one capaci...
- Publication number 20080248596
- Publication date Oct 9, 2008
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method of making circuitized substrate with resistor including mate...
- Publication number 20080151515
- Publication date Jun 26, 2008
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Circuitized substrate with internal resistor, method of making said...
- Publication number 20080087459
- Publication date Apr 17, 2008
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Capacitive substrate and method of making same
- Publication number 20070275525
- Publication date Nov 29, 2007
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Circuitized substrate with conductive paste, electrical assembly in...
- Publication number 20070221404
- Publication date Sep 27, 2007
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Non-flaking capacitor material, capacitive substrate having an inte...
- Publication number 20070177331
- Publication date Aug 2, 2007
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Circuitized substrate with soler-coated microparticle paste connect...
- Publication number 20070007033
- Publication date Jan 11, 2007
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method of making a capacitive substrate using photoimageable dielec...
- Publication number 20070010064
- Publication date Jan 11, 2007
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method of making a capacitive substrate for use as part of a larger...
- Publication number 20070010065
- Publication date Jan 11, 2007
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Rabindra N. Das

Person

Patents Grantslast 30 patents

Electrically conductive adhesive (ECA) for multilayer device interc...

Method of making a circuitized substrate

Coreless layer buildup structure with LGA and joining layer

Conducting paste for device level interconnects

Substrate having internal capacitor and method of making same

Solder and electrically conductive adhesive based interconnection f...

Electronic package with thermal interposer and method of making same

Coreless layer buildup structure

Coreless layer buildup structure with LGA

Method of forming an electrically conductive printed line

Method of forming multilayer capacitors in a printed circuit substrate

Circuitized substrate with low loss capacitive material and method...

Circuitized substrate with dielectric interposer assembly and method

Anti-tamper microchip package based on thermal nanofluids or fluids

Method of making circuitized substrate with resistor including mate...

Method of joining a semiconductor device/chip to a printed wiring b...

Multi-layer embedded capacitance and resistance substrate core

Liquid crystal polymer layer for encapsulation and improved hermiti...

Circuitized substrate with conductive paste, electrical assembly in...

Capacitive substrate

Method of making circuitized substrate with a resistor

Capacitive substrate and method of making same

Multi-layer embedded capacitance and resistance substrate core

Circuitized substrate with internal resistor, method of making said...

Capacitor material for use in circuitized substrates, circuitized s...

Method of making a capacitive substrate for use as part of a larger...

Circuitized substrate with solder-coated microparticle paste connec...

Method of making a capacitive substrate using photoimageable dielec...

Method of making an internal capacitive substrate for use in a circ...

Resistor material with metal component for use in circuitized subst...

Patents Applicationslast 30 patents

ELECTRICALLY CONDUCTIVE ADHESIVE (ECA) FOR MULTILAYER DEVICE INTERC...

CONDUCTIVE METAL MICRO-PILLARS FOR ENHANCED ELECTRICAL INTERCONNECTION

CONDUCTIVE METAL NUB FOR ENHANCED ELECTRICAL INTERCONNECTION, AND I...

CIRCUITIZED SUBSTRATE WITH INTERNAL THIN FILM CAPACITOR AND METHOD...

METHOD OF FORMING MULTILAYER CAPACITORS IN A PRINTED CIRCUIT SUBSTRATE

ELECTRONIC PACKAGE WITH THERMAL INTERPOSER AND METHOD OF MAKING SAME

CORELESS LAYER BUILDUP STRUCTURE

CORELESS LAYER BUILDUP STRUCTURE WITH LGA

ELECTRONIC PACKAGE AND METHOD OF MAKING SAME

CIRCUITIZED SUBSTRATE WITH DIELECTRIC INTERPOSER ASSEMBLY AND METHOD

LIQUID CRYSTAL POLYMER LAYER FOR ENCAPSULATION AND IMPROVED HERMITI...

CONDUCTING PASTE FOR DEVICE LEVEL INTERCONNECTS

ANTI-TAMPER MICROCHIP PACKAGE BASED ON THERMAL NANOFLUIDS OR FLUIDS

CORELESS LAYER BUILDUP STRUCTURE WITH LGA AND JOINING LAYER

CIRCUITIZED SUBSTRATE WITH CONDUCTIVE PASTE, ELECTRICAL ASSEMBLY IN...

HIGH DENSITY DECAL AND METHOD FOR ATTACHING SAME

METHOD OF MAKING CIRCUITIZED SUBSTRATE WITH RESISTOR INCLUDING MATE...

Circuitized substrate with internal resistor, method of making said...

MULTI-LAYER EMBEDDED CAPACITANCE AND RESISTANCE SUBSTRATE CORE

Mulit-layer embedded capacitance and resistance substrate core

Capacitive substrate and method of making same

Method of making a circuitized substrate having at least one capaci...

Method of making circuitized substrate with resistor including mate...

Circuitized substrate with internal resistor, method of making said...

Capacitive substrate and method of making same

Circuitized substrate with conductive paste, electrical assembly in...

Non-flaking capacitor material, capacitive substrate having an inte...

Circuitized substrate with soler-coated microparticle paste connect...

Method of making a capacitive substrate using photoimageable dielec...

Method of making a capacitive substrate for use as part of a larger...