RAJ NAIR

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HILLSBORO, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Silicon interposer-based hybrid voltage regulator system for VLSI d...
- Patent number 7,952,194
- Issue date May 31, 2011
- Intel Corporation
- Raj Nair
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic package with integrated clock distribution structure
- Patent number 6,720,814
- Issue date Apr 13, 2004
- Intel Corporation
- Henning Braunisch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low resistance contact for an integrated circuit
- Patent number 6,710,440
- Issue date Mar 23, 2004
- Intel Corporation
- Radha R. Kanaparthy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Focal plane averaging implementation for CMOS imaging arrays using...
- Patent number 6,646,245
- Issue date Nov 11, 2003
- Intel Corporation
- Raj Nair
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic package with integrated clock distribution structure
- Patent number 6,593,793
- Issue date Jul 15, 2003
- Intel Corporation
- Henning Braunisch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-sided heat removal system
- Patent number 6,580,611
- Issue date Jun 17, 2003
- Intel Corporation
- Gilroy J. Vandentop
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Socket plane
- Patent number 6,561,820
- Issue date May 13, 2003
- Intel Corporation
- Brent S. Stone
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Divided voltage de-coupling structure
- Patent number 6,271,706
- Issue date Aug 7, 2001
- Intel Corporation
- Raj Nair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for multi-mode low power voltage regulator
- Patent number 6,084,385
- Issue date Jul 4, 2000
- Intel Corporation
- Raj Nair
- G05 - CONTROLLING REGULATING
Information Patent Grant
Multi-mode low power voltage regulator
- Patent number 6,081,105
- Issue date Jun 27, 2000
- Intel Corporation
- Raj Nair
- G05 - CONTROLLING REGULATING
Information Patent Grant
Multi-mode low power voltage regulator
- Patent number 5,955,870
- Issue date Sep 21, 1999
- Intel Corporation
- Raj Nair
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
LOW RESISTANCE CONTACT FOR AN INTEGRATED CIRCUIT
- Publication number 20040036521
- Publication date Feb 26, 2004
- Intel Corporation
- Radha R. Kanaparthy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Electronic package with integrated clock distribution structure
- Publication number 20030201814
- Publication date Oct 30, 2003
- Henning Braunisch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTRONIC PACKAGE WITH INTEGRATED CLOCK DISTRIBUTION STRUCTURE
- Publication number 20030132789
- Publication date Jul 17, 2003
- Henning Braunisch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Silicon interposer-based hybrid voltage regulator system for VLSI d...
- Publication number 20030081389
- Publication date May 1, 2003
- Raj Nair
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOCKET PLANE
- Publication number 20030060063
- Publication date Mar 27, 2003
- Brent S. Stone
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FOCAL PLANE AVERAGING IMPLEMENTATION FOR CMOS IMAGING ARRAYS USING...
- Publication number 20020011551
- Publication date Jan 31, 2002
- RAJ NAIR
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Silicon interposer-based hybrid voltage regulator system for VLSI d...

Electronic package with integrated clock distribution structure

Low resistance contact for an integrated circuit

Focal plane averaging implementation for CMOS imaging arrays using...

Electronic package with integrated clock distribution structure

Dual-sided heat removal system

Socket plane

Divided voltage de-coupling structure

System and method for multi-mode low power voltage regulator

Multi-mode low power voltage regulator

Multi-mode low power voltage regulator

Patents Applicationslast 30 patents

LOW RESISTANCE CONTACT FOR AN INTEGRATED CIRCUIT

Electronic package with integrated clock distribution structure

ELECTRONIC PACKAGE WITH INTEGRATED CLOCK DISTRIBUTION STRUCTURE

Silicon interposer-based hybrid voltage regulator system for VLSI d...

SOCKET PLANE

FOCAL PLANE AVERAGING IMPLEMENTATION FOR CMOS IMAGING ARRAYS USING...