RAJA PRABHU J.

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Generating divided signals from phase-locked loop (PLL) output when...
- Patent number 12,149,255
- Issue date Nov 19, 2024
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Preventing reverse-current flow when an integrated circuit operates...
- Patent number 12,026,028
- Issue date Jul 2, 2024
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating divided signals from phase-locked loop (PLL) output when...
- Patent number 11,967,965
- Issue date Apr 23, 2024
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fast switching of output frequency of a phase locked loop (PLL)
- Patent number 11,923,864
- Issue date Mar 5, 2024
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Srinath Sridharan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fractional sampling-rate converter to generate output samples at a...
- Patent number 11,799,487
- Issue date Oct 24, 2023
- Ningbo Aura Semiconductor Co., Limited
- Sandeep Sasi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Time-to-digital converter (TDC) to operate with input clock signals...
- Patent number 11,736,110
- Issue date Aug 22, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Nandakishore Palla
- G04 - HOROLOGY
Information Patent Grant
Reducing noise contribution in compensating for unequal successive...
- Patent number 11,711,087
- Issue date Jul 25, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reduction of noise in output clock due to unequal successive time p...
- Patent number 11,658,667
- Issue date May 23, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Time-to-digital converter (TDC) measuring phase difference between...
- Patent number 11,592,786
- Issue date Feb 28, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Debasish Behera
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Obtaining lock in a phase-locked loop (PLL) upon being out of phase...
- Patent number 11,588,489
- Issue date Feb 21, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Rakesh Kumar Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Relocking a phase locked loop upon cycle slips between input and fe...
- Patent number 10,892,765
- Issue date Jan 12, 2021
- AURA SEMICONDUCTOR PVT. LTD
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Avoiding very low duty cycles in a divided clock generated by a fre...
- Patent number 10,700,669
- Issue date Jun 30, 2020
- AURA SEMICONDUCTOR PVT. LTD
- Nigesh Baladhandapani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hitless switching when generating an output clock derived from mult...
- Patent number 10,514,720
- Issue date Dec 24, 2019
- AURA SEMICONDUCTOR PVT. LTD
- Raja Prabhu J
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing errors due to non-linearities caused by a phase frequency...
- Patent number 9,742,414
- Issue date Aug 22, 2017
- AURA SEMICONDUCTOR PVT. LTD
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
GENERATING DIVIDED SIGNALS FROM PHASE-LOCKED LOOP (PLL) OUTPUT WHEN...
- Publication number 20240154617
- Publication date May 9, 2024
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
GENERATING DIVIDED SIGNALS FROM PHASE-LOCKED LOOP (PLL) OUTPUT WHEN...
- Publication number 20230136353
- Publication date May 4, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PREVENTING REVERSE-CURRENT FLOW WHEN AN INTEGRATED CIRCUIT OPERATES...
- Publication number 20230128789
- Publication date Apr 27, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST SWITCHING OF OUTPUT FREQUENCY OF A PHASE LOCKED LOOP (PLL)
- Publication number 20230122081
- Publication date Apr 20, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Srinath Sridharan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TIME-TO-DIGITAL CONVERTER (TDC) TO OPERATE WITH INPUT CLOCK SIGNALS...
- Publication number 20230108841
- Publication date Apr 6, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Nandakishore Palla
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COUNTER DESIGN FOR A TIME-TO-DIGITAL CONVERTER (TDC)
- Publication number 20230106659
- Publication date Apr 6, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Manikanta Sakalabhaktula
- G04 - HOROLOGY
Information Patent Application
Reducing Noise Contribution in Compensating for Unequal Successive...
- Publication number 20230006682
- Publication date Jan 5, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REDUCTION OF NOISE IN OUTPUT CLOCK DUE TO UNEQUAL SUCCESSIVE TIME P...
- Publication number 20230006683
- Publication date Jan 5, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FRACTIONAL SAMPLING-RATE CONVERTER TO GENERATE OUTPUT SAMPLES AT A...
- Publication number 20220311445
- Publication date Sep 29, 2022
- Ningbo Aura Semiconductor Co., Limited
- Sandeep Sasi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HITLESS SWITCHING WHEN GENERATING AN OUTPUT CLOCK DERIVED FROM MULT...
- Publication number 20190384351
- Publication date Dec 19, 2019
- Aura Semiconductor Pvt. Ltd.
- Raja Prabhu J
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AVOIDING VERY LOW DUTY CYCLES IN A DIVIDED CLOCK GENERATED BY A FRE...
- Publication number 20190386644
- Publication date Dec 19, 2019
- RMZ Ecoworld SEZ, Building 4C
- Nigesh Baladhandapani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHASE LOCKED LOOP WITH LOW PHASE-NOISE
- Publication number 20160336923
- Publication date Nov 17, 2016
- Aura Semiconductor Pvt. Ltd.
- ANKIT SEEDHER
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REDUCING ERRORS DUE TO NON-LINEARITIES CAUSED BY A PHASE FREQUENCY...
- Publication number 20160329902
- Publication date Nov 10, 2016
- Aura Semiconductor Pvt. Ltd.
- RAJA PRABHU J.
- G01 - MEASURING TESTING

RAJA PRABHU J.

Person

Patents Grantslast 30 patents

Generating divided signals from phase-locked loop (PLL) output when...

Preventing reverse-current flow when an integrated circuit operates...

Generating divided signals from phase-locked loop (PLL) output when...

Fast switching of output frequency of a phase locked loop (PLL)

Fractional sampling-rate converter to generate output samples at a...

Time-to-digital converter (TDC) to operate with input clock signals...

Reducing noise contribution in compensating for unequal successive...

Reduction of noise in output clock due to unequal successive time p...

Time-to-digital converter (TDC) measuring phase difference between...

Obtaining lock in a phase-locked loop (PLL) upon being out of phase...

Relocking a phase locked loop upon cycle slips between input and fe...

Avoiding very low duty cycles in a divided clock generated by a fre...

Hitless switching when generating an output clock derived from mult...

Reducing errors due to non-linearities caused by a phase frequency...

Patents Applicationslast 30 patents

GENERATING DIVIDED SIGNALS FROM PHASE-LOCKED LOOP (PLL) OUTPUT WHEN...

GENERATING DIVIDED SIGNALS FROM PHASE-LOCKED LOOP (PLL) OUTPUT WHEN...

PREVENTING REVERSE-CURRENT FLOW WHEN AN INTEGRATED CIRCUIT OPERATES...

FAST SWITCHING OF OUTPUT FREQUENCY OF A PHASE LOCKED LOOP (PLL)

TIME-TO-DIGITAL CONVERTER (TDC) TO OPERATE WITH INPUT CLOCK SIGNALS...

COUNTER DESIGN FOR A TIME-TO-DIGITAL CONVERTER (TDC)

Reducing Noise Contribution in Compensating for Unequal Successive...

REDUCTION OF NOISE IN OUTPUT CLOCK DUE TO UNEQUAL SUCCESSIVE TIME P...

FRACTIONAL SAMPLING-RATE CONVERTER TO GENERATE OUTPUT SAMPLES AT A...

HITLESS SWITCHING WHEN GENERATING AN OUTPUT CLOCK DERIVED FROM MULT...

AVOIDING VERY LOW DUTY CYCLES IN A DIVIDED CLOCK GENERATED BY A FRE...

PHASE LOCKED LOOP WITH LOW PHASE-NOISE

REDUCING ERRORS DUE TO NON-LINEARITIES CAUSED BY A PHASE FREQUENCY...