Rajneesh JAISWAL

Person

Sachse, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Use of a biased precoat for reduced first wafer defects in high-den...
- Patent number 7,964,517
- Issue date Jun 21, 2011
- Texas Instruments Incorporated
- Rajneesh Jaiswal
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Rapid thermal anneal equipment and method using sichrome film
- Patent number 7,455,448
- Issue date Nov 25, 2008
- Texas Instruments Incorporated
- Rajneesh Jaiswal
- G01 - MEASURING TESTING
Information Patent Grant
Resistor integration structure and technique for noise elimination
- Patent number 7,384,855
- Issue date Jun 10, 2008
- Texas Instruments Incorporated
- Rajneesh Jaiswal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nickel silicide method and structure
- Patent number 7,354,854
- Issue date Apr 8, 2008
- Texas Instruments Incorporated
- Rajneesh Jaiswal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin film resistor integration in a dual damascene structure
- Patent number 7,323,751
- Issue date Jan 29, 2008
- Texas Instruments Incorporated
- Eric Williams Beach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Resistor integration structure and technique for noise elimination
- Patent number 7,196,398
- Issue date Mar 27, 2007
- Texas Instruments Incorporated
- Rajneesh Jaiswal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for thin film resistor integration in dual damascene structure
- Patent number 6,734,076
- Issue date May 11, 2004
- Texas Instruments Incorporated
- Rajneesh Jaiswal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Control of nichorme resistor temperature coefficient using RF plasm...
- Patent number 6,664,166
- Issue date Dec 16, 2003
- Texas Instruments Incorporated
- Rajneesh Jaiswal
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
USE OF A BIASED PRECOAT FOR REDUCED FIRST WAFER DEFECTS IN HIGH-DEN...
- Publication number 20100190352
- Publication date Jul 29, 2010
- Rajneesh JAISWAL
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
METHODS FOR PARTICLE REMOVAL DURING INTEGRATED CIRCUIT DEVICE FABRI...
- Publication number 20100167552
- Publication date Jul 1, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Murlidhar Bashyam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Rapid Thermal Anneal Equipment and Method Using Sichrome Film
- Publication number 20080248599
- Publication date Oct 9, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Rajneesh Jaiswal
- G01 - MEASURING TESTING
Information Patent Application
RESISTOR INTEGRATION STRUCTURE AND TECHNIQUE FOR NOISE ELIMINATION
- Publication number 20070048960
- Publication date Mar 1, 2007
- Rajneesh Jaiswal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nickel silicide method and structure
- Publication number 20060267117
- Publication date Nov 30, 2006
- TEXAS INSTRUMENTS INCORPORATED
- Rajneesh Jaiswal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Resistor integration structure and technique for noise elimination
- Publication number 20060199315
- Publication date Sep 7, 2006
- TEXAS INSTRUMENTS INCORPORATED
- Rajneesh Jaiswal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Rapid thermal anneal equipment and method using sichrome film
- Publication number 20060019415
- Publication date Jan 26, 2006
- Rajneesh Jaiswal
- G01 - MEASURING TESTING
Information Patent Application
Thin film resistor integration in a dual damascene structure
- Publication number 20040245575
- Publication date Dec 9, 2004
- Eric Williams Beach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Control of nichrome resistor temperature coefficient using RF plasm...
- Publication number 20040087047
- Publication date May 6, 2004
- Rajneesh Jaiswal
- H01 - BASIC ELECTRIC ELEMENTS

Rajneesh JAISWAL

Person

Patents Grantslast 30 patents

Use of a biased precoat for reduced first wafer defects in high-den...

Rapid thermal anneal equipment and method using sichrome film

Resistor integration structure and technique for noise elimination

Nickel silicide method and structure

Thin film resistor integration in a dual damascene structure

Resistor integration structure and technique for noise elimination

Method for thin film resistor integration in dual damascene structure

Control of nichorme resistor temperature coefficient using RF plasm...

Patents Applicationslast 30 patents

USE OF A BIASED PRECOAT FOR REDUCED FIRST WAFER DEFECTS IN HIGH-DEN...

METHODS FOR PARTICLE REMOVAL DURING INTEGRATED CIRCUIT DEVICE FABRI...

Rapid Thermal Anneal Equipment and Method Using Sichrome Film

RESISTOR INTEGRATION STRUCTURE AND TECHNIQUE FOR NOISE ELIMINATION

Nickel silicide method and structure

Resistor integration structure and technique for noise elimination

Rapid thermal anneal equipment and method using sichrome film

Thin film resistor integration in a dual damascene structure

Control of nichrome resistor temperature coefficient using RF plasm...