Ralf Illgen

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Non-volatile transistor element including a buried ferroelectric ma...
- Patent number 10,176,859
- Issue date Jan 8, 2019
- GLOBALFOUNDRIES Inc.
- Stefan Duenkel
- G11 - INFORMATION STORAGE
Information Patent Grant
Ferroelectric FinFET
- Patent number 10,056,376
- Issue date Aug 21, 2018
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor-on-insulator wafer, semiconductor structure including...
- Patent number 9,966,466
- Issue date May 8, 2018
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure including a first transistor and a second t...
- Patent number 9,899,417
- Issue date Feb 20, 2018
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method including a formation of a transistor and semiconductor stru...
- Patent number 9,685,457
- Issue date Jun 20, 2017
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Temperature independent resistor
- Patent number 9,583,240
- Issue date Feb 28, 2017
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ferroelectric FinFET
- Patent number 9,449,972
- Issue date Sep 20, 2016
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device including a transistor having a stressed channel region and...
- Patent number 9,269,714
- Issue date Feb 23, 2016
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Replacement gate FinFET structures with high mobility channel
- Patent number 9,224,840
- Issue date Dec 29, 2015
- GLOBALFOUNDRIES, INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultrathin body fully depleted silicon-on-insulator integrated circu...
- Patent number 9,023,713
- Issue date May 5, 2015
- GLOBALFOUNDRIES, INC.
- Ralf Illgen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In situ doping and diffusionless annealing of embedded stressor reg...
- Patent number 9,012,277
- Issue date Apr 21, 2015
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strain engineering in three-dimensional transistors based on strain...
- Patent number 8,941,187
- Issue date Jan 27, 2015
- GLOBALFOUNDRIES Inc.
- Tim Baldauf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Threshold voltage adjustment in a fin transistor by corner implanta...
- Patent number 8,916,928
- Issue date Dec 23, 2014
- GLOBALFOUNDRIES Inc.
- Tim Baldauf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits having protruding source and drain regions and...
- Patent number 8,912,606
- Issue date Dec 16, 2014
- GLOBALFOUNDRIES Inc.
- Tim Baldauf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a semiconductor structure including a vertical na...
- Patent number 8,835,255
- Issue date Sep 16, 2014
- GLOBALFOUNDRIES Inc.
- Tim Baldauf
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Source and drain doping using doped raised source and drain regions
- Patent number 8,835,936
- Issue date Sep 16, 2014
- GLOBALFOUNDRIES Inc.
- Jan Hoentschel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating MOS devices with stress memorization
- Patent number 8,753,969
- Issue date Jun 17, 2014
- GLOBALFOUNDRIES, INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implantation of hydrogen to improve gate insulation layer-substrate...
- Patent number 8,647,951
- Issue date Feb 11, 2014
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Threshold voltage adjustment in a Fin transistor by corner implanta...
- Patent number 8,580,643
- Issue date Nov 12, 2013
- GLOBALFOUNDRIES Inc.
- Tim Baldauf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming stressed silicon-carbon areas in an NMOS transistor
- Patent number 8,536,034
- Issue date Sep 17, 2013
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a semiconductor device with recessed source/desi...
- Patent number 8,476,131
- Issue date Jul 2, 2013
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a PMOS device with in situ doped epitaxial sourc...
- Patent number 8,466,018
- Issue date Jun 18, 2013
- GLOBALFOUNDRIES Inc.
- Ralf Illgen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique for enhancing dopant profile and channel conductivity by...
- Patent number 8,338,885
- Issue date Dec 25, 2012
- Advanced Micro Devices, Inc.
- Jan Hoentschel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique for enhancing dopant profile and channel conductivity by...
- Patent number 8,143,133
- Issue date Mar 27, 2012
- Advanced Micro Devices, Inc.
- Jan Hoentschel
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
NON-VOLATILE TRANSISTOR ELEMENT INCLUDING A BURIED FERROELECTRIC MA...
- Publication number 20180322912
- Publication date Nov 8, 2018
- GLOBALFOUNDRIES INC.
- Stefan Duenkel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR-ON-INSULATOR WAFER, SEMICONDUCTOR STRUCTURE INCLUDING...
- Publication number 20180040731
- Publication date Feb 8, 2018
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD
- Publication number 20170338350
- Publication date Nov 23, 2017
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE INCLUDING A FIRST TRANSISTOR AND A SECOND T...
- Publication number 20170200743
- Publication date Jul 13, 2017
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD INCLUDING A FORMATION OF A TRANSISTOR AND SEMICONDUCTOR STRU...
- Publication number 20170025442
- Publication date Jan 26, 2017
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FERROELECTRIC FINFET
- Publication number 20160358915
- Publication date Dec 8, 2016
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FERROELECTRIC FINFET
- Publication number 20160260714
- Publication date Sep 8, 2016
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ROBUST POST-GATE SPACER PROCESSING AND DEVICE
- Publication number 20160071954
- Publication date Mar 10, 2016
- GLOBALFOUNDRIES INC.
- Jan HOENTSCHEL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TEMPERATURE INDEPENDENT RESISTOR
- Publication number 20160064123
- Publication date Mar 3, 2016
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ULTRATHIN BODY FULLY DEPLETED SILICON-ON-INSULATOR INTEGRATED CIRCU...
- Publication number 20150214121
- Publication date Jul 30, 2015
- GLOBALFOUNDRIES, Inc.
- Ralf Illgen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE INCLUDING A TRANSISTOR HAVING A STRESSED CHANNEL REGION AND...
- Publication number 20140361335
- Publication date Dec 11, 2014
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH EMBEDDED STRAIN-INDUCING MATERIAL FORMED IN CAVITIE...
- Publication number 20140246696
- Publication date Sep 4, 2014
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A SEMICONDUCTOR STRUCTURE INCLUDING A VERTICAL NA...
- Publication number 20140206157
- Publication date Jul 24, 2014
- GLOBALFOUNDRIES INC.
- Tim Baldauf
- B82 - NANO-TECHNOLOGY
Information Patent Application
SOURCE AND DRAIN DOPING USING DOPED RAISED SOURCE AND DRAIN REGIONS
- Publication number 20140131735
- Publication date May 15, 2014
- GLOBALFOUNDRIES INC.
- Jan Hoentschel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL SILICON-BASED TRANSISTOR COMPRISING A HIGH-MOBILI...
- Publication number 20140117418
- Publication date May 1, 2014
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THRESHOLD VOLTAGE ADJUSTMENT IN A FIN TRANSISTOR BY CORNER IMPLANTA...
- Publication number 20140027825
- Publication date Jan 30, 2014
- GLOBALFOUNDRIES INC.
- Tim Baldauf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING HIGH CARRIER MOBILITY FINFET STRUCTURES
- Publication number 20140030876
- Publication date Jan 30, 2014
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET STRUCTURES AND METHODS FOR FABRICATING THE SAME
- Publication number 20140015055
- Publication date Jan 16, 2014
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ULTRATHIN BODY FULLY DEPLETED SILICON-ON-INSULATOR INTEGRATED CIRCU...
- Publication number 20130341722
- Publication date Dec 26, 2013
- GLOBALFOUNDRIES INC.
- Ralf Illgen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS HAVING PROTRUDING SOURCE AND DRAIN REGIONS AND...
- Publication number 20130277746
- Publication date Oct 24, 2013
- GLOBALFOUNDRIES INC.
- Tim Baldauf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING FEATURES ON AN INTEGRATED CIRCUIT PRODUCT USING...
- Publication number 20130244437
- Publication date Sep 19, 2013
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING MOS DEVICES WITH STRESS MEMORIZATION
- Publication number 20130196495
- Publication date Aug 1, 2013
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Strain Engineering in Three-Dimensional Transistors Based on Strain...
- Publication number 20130181299
- Publication date Jul 18, 2013
- GLOBALFOUNDRIES INC.
- Tim Baldauf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
In Situ Doping and Diffusionless Annealing of Embedded Stressor Reg...
- Publication number 20130178024
- Publication date Jul 11, 2013
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS ENHANCED MOS TRANSISTOR AND METHODS FOR FABRICATION
- Publication number 20130175640
- Publication date Jul 11, 2013
- GLOBALFOUNDRIES INC.
- Ralf Illgen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS SEMICONDUCTOR DEVICES HAVING STRESSOR REGIONS AND RELATED FABR...
- Publication number 20130069123
- Publication date Mar 21, 2013
- GLOBALFOUNDRIES INC.
- Ralf Illgen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Implantation of Hydrogen to Improve Gate Insulation Layer-Substrate...
- Publication number 20130052782
- Publication date Feb 28, 2013
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Threshold Voltage Adjustment in a Fin Transistor by Corner Implanta...
- Publication number 20130049121
- Publication date Feb 28, 2013
- GLOBALFOUNDRIES INC.
- Tim Baldauf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming Stressed Silicon-Carbon Areas in an NMOS Transistor
- Publication number 20130052783
- Publication date Feb 28, 2013
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming a Semiconductor Device with Recessed Source/Drai...
- Publication number 20130049126
- Publication date Feb 28, 2013
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS

Ralf Illgen

Person

Patents Grantslast 30 patents

Non-volatile transistor element including a buried ferroelectric ma...

Ferroelectric FinFET

Semiconductor-on-insulator wafer, semiconductor structure including...

Semiconductor structure including a first transistor and a second t...

Method including a formation of a transistor and semiconductor stru...

Temperature independent resistor

Ferroelectric FinFET

Device including a transistor having a stressed channel region and...

Replacement gate FinFET structures with high mobility channel

Ultrathin body fully depleted silicon-on-insulator integrated circu...

In situ doping and diffusionless annealing of embedded stressor reg...

Strain engineering in three-dimensional transistors based on strain...

Threshold voltage adjustment in a fin transistor by corner implanta...

Integrated circuits having protruding source and drain regions and...

Method of forming a semiconductor structure including a vertical na...

Source and drain doping using doped raised source and drain regions

Methods for fabricating MOS devices with stress memorization

Implantation of hydrogen to improve gate insulation layer-substrate...

Threshold voltage adjustment in a Fin transistor by corner implanta...

Methods of forming stressed silicon-carbon areas in an NMOS transistor

Methods of forming a semiconductor device with recessed source/desi...

Methods of forming a PMOS device with in situ doped epitaxial sourc...

Technique for enhancing dopant profile and channel conductivity by...

Technique for enhancing dopant profile and channel conductivity by...

Patents Applicationslast 30 patents

NON-VOLATILE TRANSISTOR ELEMENT INCLUDING A BURIED FERROELECTRIC MA...

SEMICONDUCTOR-ON-INSULATOR WAFER, SEMICONDUCTOR STRUCTURE INCLUDING...

SEMICONDUCTOR DEVICE AND METHOD

SEMICONDUCTOR STRUCTURE INCLUDING A FIRST TRANSISTOR AND A SECOND T...

METHOD INCLUDING A FORMATION OF A TRANSISTOR AND SEMICONDUCTOR STRU...

FERROELECTRIC FINFET

FERROELECTRIC FINFET

ROBUST POST-GATE SPACER PROCESSING AND DEVICE

TEMPERATURE INDEPENDENT RESISTOR

ULTRATHIN BODY FULLY DEPLETED SILICON-ON-INSULATOR INTEGRATED CIRCU...

DEVICE INCLUDING A TRANSISTOR HAVING A STRESSED CHANNEL REGION AND...

TRANSISTOR WITH EMBEDDED STRAIN-INDUCING MATERIAL FORMED IN CAVITIE...

METHOD OF FORMING A SEMICONDUCTOR STRUCTURE INCLUDING A VERTICAL NA...

SOURCE AND DRAIN DOPING USING DOPED RAISED SOURCE AND DRAIN REGIONS

THREE-DIMENSIONAL SILICON-BASED TRANSISTOR COMPRISING A HIGH-MOBILI...

THRESHOLD VOLTAGE ADJUSTMENT IN A FIN TRANSISTOR BY CORNER IMPLANTA...

METHODS FOR FABRICATING HIGH CARRIER MOBILITY FINFET STRUCTURES

FINFET STRUCTURES AND METHODS FOR FABRICATING THE SAME

ULTRATHIN BODY FULLY DEPLETED SILICON-ON-INSULATOR INTEGRATED CIRCU...

INTEGRATED CIRCUITS HAVING PROTRUDING SOURCE AND DRAIN REGIONS AND...

METHODS OF FORMING FEATURES ON AN INTEGRATED CIRCUIT PRODUCT USING...

METHODS FOR FABRICATING MOS DEVICES WITH STRESS MEMORIZATION

Strain Engineering in Three-Dimensional Transistors Based on Strain...

In Situ Doping and Diffusionless Annealing of Embedded Stressor Reg...

STRESS ENHANCED MOS TRANSISTOR AND METHODS FOR FABRICATION

CMOS SEMICONDUCTOR DEVICES HAVING STRESSOR REGIONS AND RELATED FABR...

Implantation of Hydrogen to Improve Gate Insulation Layer-Substrate...

Threshold Voltage Adjustment in a Fin Transistor by Corner Implanta...

Methods of Forming Stressed Silicon-Carbon Areas in an NMOS Transistor

Methods of Forming a Semiconductor Device with Recessed Source/Drai...