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Ratan Choudhury
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Milpitas, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Sidewall structure for metal interconnect and method of making same
Patent number
6,303,995
Issue date
Oct 16, 2001
LSI Logic Corporation
Ashok K. Kapoor
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method for adjusting the density of lines and contact openings acro...
Patent number
6,109,775
Issue date
Aug 29, 2000
LSI Logic Corporation
Prabhakar P. Tripathi
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Multilevel metallization structure for integrated circuit I/O lines...
Patent number
5,789,783
Issue date
Aug 4, 1998
LSI Logic Corporation
Ratan K. Choudhury
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method of doping metal layers for electromigration resistance
Patent number
5,681,779
Issue date
Oct 28, 1997
LSI Logic Corporation
Nicholas F. Pasch
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method for fabricating reliable metallization with Ta-Si-N barrier...
Patent number
5,614,437
Issue date
Mar 25, 1997
LSI Logic Corporation
Ratan K. Choudhury
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Reliable metallization with barrier for semiconductors
Patent number
5,525,837
Issue date
Jun 11, 1996
LSI Logic Corporation
Ratan K. Choudhury
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Determination of failure criteria based upon grain boundary electro...
Patent number
5,497,076
Issue date
Mar 5, 1996
LSI Logic Corporation
Arthur T. C. Kuo
G01 - MEASURING TESTING
Patents Applications
last 30 patents
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Patent Application
Copper-low-K dual damascene interconnect with improved reliability
Publication number
20050006770
Publication date
Jan 13, 2005
Valeriy Sukharev
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Algorithm for fast determination of suspicious cites inside interco...
Publication number
20040111244
Publication date
Jun 10, 2004
Valeriy Sukharev
G06 - COMPUTING CALCULATING COUNTING