Raul-Adrian Cernea

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Staircase structures for electrically connecting multiple horizonta...
- Patent number 12,096,630
- Issue date Sep 17, 2024
- SUNRISE MEMORY CORPORATION
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Quasi-volatile memory with enhanced sense amplifier operation
- Patent number 11,848,056
- Issue date Dec 19, 2023
- SUNRISE MEMORY CORPORATION
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for reducing disturb errors by refreshing data alongside pr...
- Patent number 11,842,777
- Issue date Dec 12, 2023
- SUNRISE MEMORY CORPORATION
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Grant
3-dimensional nor strings with segmented shared source regions
- Patent number 11,751,388
- Issue date Sep 5, 2023
- SUNRISE MEMORY CORPORATION
- Eli Harari
- G11 - INFORMATION STORAGE
Information Patent Grant
Sensing in floating-source memory architecture
- Patent number 11,610,635
- Issue date Mar 21, 2023
- SUNRISE MEMORY CORPORATION
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Grant
3-dimensional NOR strings with segmented shared source regions
- Patent number 11,335,693
- Issue date May 17, 2022
- SUNRISE MEMORY CORPORATION
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sensing in floating-source memory architecture
- Patent number 11,087,850
- Issue date Aug 10, 2021
- SUNRISE MEMORY CORPORATION
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device structure for a 3-dimensional NOR memory array and methods f...
- Patent number 11,069,696
- Issue date Jul 20, 2021
- SUNRISE MEMORY CORPORATION
- Eli Harari
- G11 - INFORMATION STORAGE
Information Patent Grant
3-dimensional NOR strings with segmented shared source regions
- Patent number 10,950,616
- Issue date Mar 16, 2021
- SUNRISE MEMORY CORPORATION
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sensing in floating source string NOR architecture
- Patent number 10,672,484
- Issue date Jun 2, 2020
- SUNRISE MEMORY CORPORATION
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Grant
3-dimensional nor strings with segmented shared source regions
- Patent number 10,608,008
- Issue date Mar 31, 2020
- SUNRISE MEMORY CORPORATION
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Highly compact non-volatile memory and method thereof
- Patent number 10,204,679
- Issue date Feb 12, 2019
- Innovative Memory Systems, Inc.
- Raul-Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for coupling up a voltage-setting transistor f...
- Patent number 10,037,810
- Issue date Jul 31, 2018
- SanDisk Technologies LLC
- Hemant Shukla
- G11 - INFORMATION STORAGE
Information Patent Grant
Rewritable multibit non-volatile memory with soft decode optimization
- Patent number 9,946,468
- Issue date Apr 17, 2018
- SanDisk Technologies LLC
- Kevin Michael Conley
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier with program biasing and fast sensing
- Patent number 9,881,676
- Issue date Jan 30, 2018
- SanDisk Technologies LLC
- Jong Hak Yuh
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for word line connections in 3D memory
- Patent number 9,825,048
- Issue date Nov 21, 2017
- SanDisk Technologies LLC
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Rewritable multibit non-volatile memory with soft decode optimization
- Patent number 9,640,253
- Issue date May 2, 2017
- SanDisk Technologies LLC
- Kevin Michael Conley
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-state programming for non-volatile memory
- Patent number 9,595,317
- Issue date Mar 14, 2017
- SanDisk Technologies LLC
- Yen-Lung Li
- G11 - INFORMATION STORAGE
Information Patent Grant
3D memory having NAND strings switched by transistors with elongate...
- Patent number 9,496,272
- Issue date Nov 15, 2016
- SanDisk Technologies LLC
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for 3D NAND memory with socketed floating gate cells
- Patent number 9,478,557
- Issue date Oct 25, 2016
- SanDisk Technologies LLC
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Efficient process for 3D NAND memory with socketed floating gate cells
- Patent number 9,431,411
- Issue date Aug 30, 2016
- SanDisk Technologies LLC
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for 3D NAND memory with socketed floating gate cells
- Patent number 9,419,006
- Issue date Aug 16, 2016
- SanDisk Technologies LLC
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Rewritable multibit non-volatile memory with soft decode optimization
- Patent number 9,406,377
- Issue date Aug 2, 2016
- SanDisk Technologies LLC
- Kevin Michael Conley
- G11 - INFORMATION STORAGE
Information Patent Grant
Highly linear analog-to-digital converter and method for nonvolatil...
- Patent number 9,373,408
- Issue date Jun 21, 2016
- SanDisk Technologies, Inc
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Grant
3D NAND memory with socketed floating gate cells and process therefor
- Patent number 9,331,091
- Issue date May 3, 2016
- SanDisk Technologies, Inc
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory having 3D array architecture with bit line volt...
- Patent number 9,281,029
- Issue date Mar 8, 2016
- Sandisk 3D LLC
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Grant
3D NAND memory with socketed floating gate cells
- Patent number 9,236,393
- Issue date Jan 12, 2016
- SanDisk Technologies Inc.
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory having 3D array architecture with staircase wor...
- Patent number 9,147,439
- Issue date Sep 29, 2015
- Sandisk 3D LLC
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential current sense amplifier and method for non-volatile me...
- Patent number 9,123,430
- Issue date Sep 1, 2015
- Sandisk 3D LLC
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Grant
3D non-volatile memory having low-current cells and methods
- Patent number 9,064,547
- Issue date Jun 23, 2015
- Sandisk 3D LLC
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHODS FOR REDUCING DISTURB ERRORS BY REFRESHING DATA ALONGSIDE PR...
- Publication number 20240062838
- Publication date Feb 22, 2024
- Sunrise Memory Corporation
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Application
Memory System Implementing Write Abort Operation For Reduced Read L...
- Publication number 20230195314
- Publication date Jun 22, 2023
- Sunrise Memory Corporation
- Masahiro Yoshihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Device Including Arrangement of Independently And Concurrent...
- Publication number 20230187413
- Publication date Jun 15, 2023
- Sunrise Memory Corporation
- Masahiro Yoshihara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3-DIMENSIONAL NOR STRINGS WITH SEGMENTED SHARED SOURCE REGIONS
- Publication number 20220238545
- Publication date Jul 28, 2022
- Sunrise Memory Corporation
- Eli Harari
- G11 - INFORMATION STORAGE
Information Patent Application
QUASI-VOLATILE MEMORY WITH ENHANCED SENSE AMPLIFIER OPERATION
- Publication number 20220180943
- Publication date Jun 9, 2022
- Sunrise Memory Corporation
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS FOR REDUCING DISTURB ERRORS BY REFRESHING DATA ALONGSIDE PR...
- Publication number 20220157391
- Publication date May 19, 2022
- Sunrise Memory Corporation
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Application
SENSING IN FLOATING-SOURCE MEMORY ARCHITECTURE
- Publication number 20210335429
- Publication date Oct 28, 2021
- Sunrise Memory Corporation
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3-Dimensional NOR Strings with Segmented Shared Source Regions
- Publication number 20210233926
- Publication date Jul 29, 2021
- SUNRISE MEMORY CORPORATION
- Eli Harari
- G11 - INFORMATION STORAGE
Information Patent Application
SENSING IN FLOATING-SOURCE MEMORY ARCHITECTURE
- Publication number 20200258581
- Publication date Aug 13, 2020
- SUNRISE MEMORY CORPORATION
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Application
3-Dimensional NOR Strings with Segmented Shared Source Regions
- Publication number 20200185404
- Publication date Jun 11, 2020
- SUNRISE MEMORY CORPORATION
- Eli Harari
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Staircase Structures for Electrically Connecting Multiple Horizonta...
- Publication number 20200098779
- Publication date Mar 26, 2020
- SUNRISE MEMORY CORPORATION
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Device Structure for a 3-Dimensional NOR Memory Array and Methods f...
- Publication number 20200051990
- Publication date Feb 13, 2020
- SUNRISE MEMORY CORPORATION
- Eli Harari
- G11 - INFORMATION STORAGE
Information Patent Application
SENSING IN FLOATING SOURCE STRING NOR ARCHITECTURE
- Publication number 20190156900
- Publication date May 23, 2019
- SUNRISE MEMORY CORPORATION
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Application
3-Dimensional NOR Strings with Segmented Shared Source Regions
- Publication number 20180366485
- Publication date Dec 20, 2018
- SUNRISE MEMORY CORPORATION
- Eli Harari
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Rewritable Multibit Non-Volatile Memory With Soft Decode Optimization
- Publication number 20170185299
- Publication date Jun 29, 2017
- SanDisk Technologies LLC
- Kevin Michael Conley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGHLY COMPACT NON-VOLATILE MEMORY AND METHOD THEREOF
- Publication number 20170125088
- Publication date May 4, 2017
- WiLAN, INC
- Raul-Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Application
Process for Word Line Connections in 3D Memory
- Publication number 20170047339
- Publication date Feb 16, 2017
- SanDisk Technologies LLC
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D Memory Having Vertical Switches with Surround Gates and Method T...
- Publication number 20170040381
- Publication date Feb 9, 2017
- SanDisk Technologies LLC
- Yung-Tin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-STATE PROGRAMMING FOR NON-VOLATILE MEMORY
- Publication number 20160351254
- Publication date Dec 1, 2016
- SANDISK TECHNOLOGIES INC.
- Yen-Lung Li
- G11 - INFORMATION STORAGE
Information Patent Application
Rewritable Multibit Non-Volatile Memory With Soft Decode Optimization
- Publication number 20160314834
- Publication date Oct 27, 2016
- SanDisk Technologies LLC
- Kevin Michael Conley
- G11 - INFORMATION STORAGE
Information Patent Application
Rewritable Multibit Non-Volatile Memory With Soft Decode Optimization
- Publication number 20160163382
- Publication date Jun 9, 2016
- SANDISK TECHNOLOGIES INC.
- Kevin Michael Conley
- G11 - INFORMATION STORAGE
Information Patent Application
HIGHLY LINEAR ANALOG-TO-DIGITAL CONVERTER AND METHOD FOR NONVOLATIL...
- Publication number 20160099073
- Publication date Apr 7, 2016
- SanDisk Technologies, Inc.
- RAUL ADRIAN CERNEA
- G11 - INFORMATION STORAGE
Information Patent Application
3D MEMORY HAVING NAND STRINGS SWITCHED BY TRANSISTORS WITH ELONGATE...
- Publication number 20160087055
- Publication date Mar 24, 2016
- SanDisk Technologies, Inc.
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS FOR 3D NAND MEMORY WITH SOCKETED FLOATING GATE CELLS
- Publication number 20160086963
- Publication date Mar 24, 2016
- SanDisk Technologies, Inc.
- Raul Adrian Cernea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGHLY COMPACT NON-VOLATILE MEMORY AND METHOD THEREOF
- Publication number 20150348617
- Publication date Dec 3, 2015
- WiLAN, INC
- Raul-Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Application
DIFFERENTIAL CURRENT SENSE AMPLIFIER AND METHOD FOR NON-VOLATILE ME...
- Publication number 20140369132
- Publication date Dec 18, 2014
- SanDisk 3D LLC
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Application
3D Non-Volatile Memory Having Low-Current Cells and Methods
- Publication number 20140254231
- Publication date Sep 11, 2014
- SanDisk 3D LLC
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY HAVING 3D ARRAY ARCHITECTURE WITH BIT LINE VOLT...
- Publication number 20130336036
- Publication date Dec 19, 2013
- SanDisk 3D LLC
- Raul Adrian Cernea
- G11 - INFORMATION STORAGE
Information Patent Application
3D MEMORY HAVING VERTICAL SWITCHES WITH SURROUND GATES AND METHOD T...
- Publication number 20130336037
- Publication date Dec 19, 2013
- SanDisk 3D LLC
- Yung-Tin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR FORMING STAIRCASE WORD LINES IN A 3D NON-VOLATILE MEMORY...
- Publication number 20130337646
- Publication date Dec 19, 2013
- SanDisk 3D LLC
- Raul Adrian Cernea
- G06 - COMPUTING CALCULATING COUNTING

Raul-Adrian Cernea

Person

Patents Grantslast 30 patents

Staircase structures for electrically connecting multiple horizonta...

Quasi-volatile memory with enhanced sense amplifier operation

Methods for reducing disturb errors by refreshing data alongside pr...

3-dimensional nor strings with segmented shared source regions

Sensing in floating-source memory architecture

3-dimensional NOR strings with segmented shared source regions

Sensing in floating-source memory architecture

Device structure for a 3-dimensional NOR memory array and methods f...

3-dimensional NOR strings with segmented shared source regions

Sensing in floating source string NOR architecture

3-dimensional nor strings with segmented shared source regions

Highly compact non-volatile memory and method thereof

Method and apparatus for coupling up a voltage-setting transistor f...

Rewritable multibit non-volatile memory with soft decode optimization

Sense amplifier with program biasing and fast sensing

Process for word line connections in 3D memory

Rewritable multibit non-volatile memory with soft decode optimization

Multi-state programming for non-volatile memory

3D memory having NAND strings switched by transistors with elongate...

Process for 3D NAND memory with socketed floating gate cells

Efficient process for 3D NAND memory with socketed floating gate cells

Process for 3D NAND memory with socketed floating gate cells

Rewritable multibit non-volatile memory with soft decode optimization

Highly linear analog-to-digital converter and method for nonvolatil...

3D NAND memory with socketed floating gate cells and process therefor

Non-volatile memory having 3D array architecture with bit line volt...

3D NAND memory with socketed floating gate cells

Non-volatile memory having 3D array architecture with staircase wor...

Differential current sense amplifier and method for non-volatile me...

3D non-volatile memory having low-current cells and methods

Patents Applicationslast 30 patents

METHODS FOR REDUCING DISTURB ERRORS BY REFRESHING DATA ALONGSIDE PR...

Memory System Implementing Write Abort Operation For Reduced Read L...

Memory Device Including Arrangement of Independently And Concurrent...

3-DIMENSIONAL NOR STRINGS WITH SEGMENTED SHARED SOURCE REGIONS

QUASI-VOLATILE MEMORY WITH ENHANCED SENSE AMPLIFIER OPERATION

METHODS FOR REDUCING DISTURB ERRORS BY REFRESHING DATA ALONGSIDE PR...

SENSING IN FLOATING-SOURCE MEMORY ARCHITECTURE

3-Dimensional NOR Strings with Segmented Shared Source Regions

SENSING IN FLOATING-SOURCE MEMORY ARCHITECTURE

3-Dimensional NOR Strings with Segmented Shared Source Regions

Staircase Structures for Electrically Connecting Multiple Horizonta...

Device Structure for a 3-Dimensional NOR Memory Array and Methods f...

SENSING IN FLOATING SOURCE STRING NOR ARCHITECTURE

3-Dimensional NOR Strings with Segmented Shared Source Regions

Rewritable Multibit Non-Volatile Memory With Soft Decode Optimization

HIGHLY COMPACT NON-VOLATILE MEMORY AND METHOD THEREOF

Process for Word Line Connections in 3D Memory

3D Memory Having Vertical Switches with Surround Gates and Method T...

MULTI-STATE PROGRAMMING FOR NON-VOLATILE MEMORY

Rewritable Multibit Non-Volatile Memory With Soft Decode Optimization

Rewritable Multibit Non-Volatile Memory With Soft Decode Optimization

HIGHLY LINEAR ANALOG-TO-DIGITAL CONVERTER AND METHOD FOR NONVOLATIL...

3D MEMORY HAVING NAND STRINGS SWITCHED BY TRANSISTORS WITH ELONGATE...

PROCESS FOR 3D NAND MEMORY WITH SOCKETED FLOATING GATE CELLS

HIGHLY COMPACT NON-VOLATILE MEMORY AND METHOD THEREOF

DIFFERENTIAL CURRENT SENSE AMPLIFIER AND METHOD FOR NON-VOLATILE ME...

3D Non-Volatile Memory Having Low-Current Cells and Methods

NON-VOLATILE MEMORY HAVING 3D ARRAY ARCHITECTURE WITH BIT LINE VOLT...

3D MEMORY HAVING VERTICAL SWITCHES WITH SURROUND GATES AND METHOD T...

METHOD FOR FORMING STAIRCASE WORD LINES IN A 3D NON-VOLATILE MEMORY...