Ravindranath DODDI

Person

Hyderabad, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Mechanism to reduce exit latency for deeper power saving modes L2 i...
- Patent number 12,164,448
- Issue date Dec 10, 2024
- QUALCOMM Incorporated
- Ravindranath Doddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data rate increase for faulty lane recovery in multiple lane data l...
- Patent number 12,153,527
- Issue date Nov 26, 2024
- QUALCOMM Incorporated
- Santhosh Reddy Akavaram
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management for peripheral component interconnect
- Patent number 12,079,061
- Issue date Sep 3, 2024
- QUALCOMM Incorporated
- Prakhar Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latency reduction for link speed switching in multiple lane data links
- Patent number 12,019,577
- Issue date Jun 25, 2024
- QUALCOMM Incorporated
- Prakhar Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management for peripheral component interconnect
- Patent number 11,934,335
- Issue date Mar 19, 2024
- QUALCOMM Incorporated
- Prakhar Srivastava
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
EXPANDED DATA LINK WIDTH FOR MAIN BAND CHIP MODULE CONNECTION IN AL...
- Publication number 20250021504
- Publication date Jan 16, 2025
- QUALCOMM Incorporated
- Ravindranath DODDI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR REDUCING LATENCY AND IMPROVING PERFORMANCE...
- Publication number 20240427714
- Publication date Dec 26, 2024
- QUALCOMM Incorporated
- Surendra PARAVADA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR REDUCING LATENCY AND POWER CONSUMPTION IN A...
- Publication number 20240419613
- Publication date Dec 19, 2024
- QUALCOMM Incorporated
- Madhu Yashwanth BOENAPALLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED TRAINING FOR MAIN BAND CHIP MODULE INTERCONNECTION CLOCK LINES
- Publication number 20240402751
- Publication date Dec 5, 2024
- QUALCOMM Incorporated
- Lekhya Pavani GODAVARTHI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE LINK WIDTH IN TWO DIRECTIONS FOR MAIN BAND CHIP MODULE CON...
- Publication number 20240354279
- Publication date Oct 24, 2024
- QUALCOMM Incorporated
- Ravindranath DODDI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL DATA LINKS
- Publication number 20240354141
- Publication date Oct 24, 2024
- QUALCOMM Incorporated
- Prakhar SRIVASTAVA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE CLOCK LANE OPERATION FOR A MAIN BAND OF A DIE-TO-DIE CONNECTION
- Publication number 20240345976
- Publication date Oct 17, 2024
- QUALCOMM Incorporated
- Ravindranath DODDI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHANNEL DIRECTION MANAGEMENT FOR BUS INTERFACES
- Publication number 20240264965
- Publication date Aug 8, 2024
- QUALCOMM Incorporated
- Prakhar Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA RATE INCREASE FOR FAULTY LANE RECOVERY IN MULTIPLE LANE DATA L...
- Publication number 20240202140
- Publication date Jun 20, 2024
- QUALCOMM Incorporated
- Santhosh Reddy AKAVARAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLOW CONTROL BETWEEN PERIPHERAL COMPONENT INTERCONNECT EXPRESS DEVICES
- Publication number 20240143434
- Publication date May 2, 2024
- QUALCOMM Incorporated
- Santhosh Reddy AKAVARAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LATENCY REDUCTION FOR LINK SPEED SWITCHING IN MULTIPLE LANE DATA LINKS
- Publication number 20240111700
- Publication date Apr 4, 2024
- QUALCOMM Incorporated
- Prakhar SRIVASTAVA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGEMENT FOR PERIPHERAL COMPONENT INTERCONNECT
- Publication number 20240111354
- Publication date Apr 4, 2024
- QUALCOMM Incorporated
- Prakhar SRIVASTAVA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGEMENT FOR PERIPHERAL COMPONENT INTERCONNECT
- Publication number 20230325342
- Publication date Oct 12, 2023
- QUALCOMM Incorporated
- Prakhar SRIVASTAVA
- G06 - COMPUTING CALCULATING COUNTING

Ravindranath DODDI

Person

Patents Grantslast 30 patents

Mechanism to reduce exit latency for deeper power saving modes L2 i...

Data rate increase for faulty lane recovery in multiple lane data l...

Power management for peripheral component interconnect

Latency reduction for link speed switching in multiple lane data links

Power management for peripheral component interconnect

Patents Applicationslast 30 patents

EXPANDED DATA LINK WIDTH FOR MAIN BAND CHIP MODULE CONNECTION IN AL...

SYSTEMS AND METHODS FOR REDUCING LATENCY AND IMPROVING PERFORMANCE...

SYSTEMS AND METHODS FOR REDUCING LATENCY AND POWER CONSUMPTION IN A...

REDUCED TRAINING FOR MAIN BAND CHIP MODULE INTERCONNECTION CLOCK LINES

VARIABLE LINK WIDTH IN TWO DIRECTIONS FOR MAIN BAND CHIP MODULE CON...

VIRTUAL DATA LINKS

SINGLE CLOCK LANE OPERATION FOR A MAIN BAND OF A DIE-TO-DIE CONNECTION

CHANNEL DIRECTION MANAGEMENT FOR BUS INTERFACES

DATA RATE INCREASE FOR FAULTY LANE RECOVERY IN MULTIPLE LANE DATA L...

FLOW CONTROL BETWEEN PERIPHERAL COMPONENT INTERCONNECT EXPRESS DEVICES

LATENCY REDUCTION FOR LINK SPEED SWITCHING IN MULTIPLE LANE DATA LINKS

POWER MANAGEMENT FOR PERIPHERAL COMPONENT INTERCONNECT

POWER MANAGEMENT FOR PERIPHERAL COMPONENT INTERCONNECT