Reken Patel

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Contact over active gate structures with metal oxide layers to inhi...
- Patent number 12,080,639
- Issue date Sep 3, 2024
- Intel Corporation
- Rami Hourani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of gate-all-around integrated circuit structures having...
- Patent number 11,990,472
- Issue date May 21, 2024
- Intel Corporation
- Leonard P. Guler
- G11 - INFORMATION STORAGE
Information Patent Grant
1D vertical edge blocking (VEB) via and plug
- Patent number 11,972,979
- Issue date Apr 30, 2024
- Intel Corporation
- Leonard P. Guler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
1D vertical edge blocking (VEB) via and plug
- Patent number 11,721,580
- Issue date Aug 8, 2023
- Intel Corporation
- Leonard P. Guler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via contact patterning method to increase edge placement error margin
- Patent number 11,652,045
- Issue date May 16, 2023
- Intel Corporation
- Mohit K. Haran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via contact patterning method to increase edge placement error margin
- Patent number 11,211,324
- Issue date Dec 28, 2021
- Intel Corporation
- Mohit K. Haran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive via and metal line end fabrication and structures result...
- Patent number 11,145,541
- Issue date Oct 12, 2021
- Intel Corporation
- Charles H. Wallace
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Group IV metal or semiconductor nanowire fabric
- Patent number 10,038,213
- Issue date Jul 31, 2018
- Pinion Technologies, Inc.
- Brian A. Korgel
- B82 - NANO-TECHNOLOGY

Patents Applicationslast 30 patents

Information Patent Application
PLASMA ENHANCED ATOMIC LAYER DEPOSITION OF DIELECTRIC MATERIAL UPON...
- Publication number 20240332071
- Publication date Oct 3, 2024
- Intel Corporation
- Alireza Narimannezhad
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
GATE CUT, AND SOURCE AND DRAIN CONTACTS
- Publication number 20240222447
- Publication date Jul 4, 2024
- Intel Corporation
- Reken Patel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...
- Publication number 20240178226
- Publication date May 30, 2024
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SOURCE OR DRAIN CONTACT FLYOVER
- Publication number 20240113177
- Publication date Apr 4, 2024
- Intel Corporation
- Sukru Yemenicioglu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
1D VERTICAL EDGE BLOCKING (VEB) VIA AND PLUG
- Publication number 20230326794
- Publication date Oct 12, 2023
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECESSED TRANSISTOR TERMINAL VIA JUMPERS
- Publication number 20230320057
- Publication date Oct 5, 2023
- Intel Corporation
- Clifford Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT OVER ACTIVE GATE STRUCTURES WITH CONDUCTIVE TRENCH CONTACT...
- Publication number 20230095402
- Publication date Mar 30, 2023
- Intel Corporation
- Manish CHANDHOK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT OVER ACTIVE GATE STRUCTURES WITH CONDUCTIVE TRENCH CONTACT...
- Publication number 20230101212
- Publication date Mar 30, 2023
- Intel Corporation
- Manish CHANDHOK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING PLUGGED METAL GATES
- Publication number 20220406778
- Publication date Dec 22, 2022
- Intel Corporation
- Tahir GHANI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...
- Publication number 20220093592
- Publication date Mar 24, 2022
- Intel Corporation
- Leonard P. GULER
- G11 - INFORMATION STORAGE
Information Patent Application
VIA CONTACT PATTERNING METHOD TO INCREASE EDGE PLACEMENT ERROR MARGIN
- Publication number 20220051975
- Publication date Feb 17, 2022
- Intel Corporation
- Mohit K. Haran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LINE PATTERNING IN INTEGRATED CIRCUIT DEVICES
- Publication number 20210183761
- Publication date Jun 17, 2021
- Intel Corporation
- Reken Patel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED PATTERNING WITH COLORED BLOCKING AND STRUCTURES RESULT...
- Publication number 20210090997
- Publication date Mar 25, 2021
- Intel Corporation
- Mohit K. HARAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT OVER ACTIVE GATE STRUCTURES WITH METAL OXIDE LAYERS TO INHI...
- Publication number 20210090990
- Publication date Mar 25, 2021
- Intel Corporation
- Rami HOURANI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA CONTACT PATTERNING METHOD TO INCREASE EDGE PLACEMENT ERROR MARGIN
- Publication number 20210082805
- Publication date Mar 18, 2021
- Intel Corporation
- Mohit K. Haran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
1D VERTICAL EDGE BLOCKING (VEB) VIA AND PLUG
- Publication number 20200388534
- Publication date Dec 10, 2020
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE VIA AND METAL LINE END FABRICATION AND STRUCTURES RESULT...
- Publication number 20200185271
- Publication date Jun 11, 2020
- Intel Corporation
- Charles H. WALLACE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GROUP IV METAL OR SEMICONDUCTOR NANOWIRE FABRIC
- Publication number 20110223484
- Publication date Sep 15, 2011
- Pinon Technologies, Inc.
- Brian A. Korgel
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Reken Patel

Person

Patents Grantslast 30 patents

Contact over active gate structures with metal oxide layers to inhi...

Fabrication of gate-all-around integrated circuit structures having...

1D vertical edge blocking (VEB) via and plug

1D vertical edge blocking (VEB) via and plug

Via contact patterning method to increase edge placement error margin

Via contact patterning method to increase edge placement error margin

Conductive via and metal line end fabrication and structures result...

Group IV metal or semiconductor nanowire fabric

Patents Applicationslast 30 patents

PLASMA ENHANCED ATOMIC LAYER DEPOSITION OF DIELECTRIC MATERIAL UPON...

GATE CUT, AND SOURCE AND DRAIN CONTACTS

FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...

STACKED SOURCE OR DRAIN CONTACT FLYOVER

1D VERTICAL EDGE BLOCKING (VEB) VIA AND PLUG

RECESSED TRANSISTOR TERMINAL VIA JUMPERS

CONTACT OVER ACTIVE GATE STRUCTURES WITH CONDUCTIVE TRENCH CONTACT...

CONTACT OVER ACTIVE GATE STRUCTURES WITH CONDUCTIVE TRENCH CONTACT...

INTEGRATED CIRCUIT STRUCTURES HAVING PLUGGED METAL GATES

FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...

VIA CONTACT PATTERNING METHOD TO INCREASE EDGE PLACEMENT ERROR MARGIN

LINE PATTERNING IN INTEGRATED CIRCUIT DEVICES

SELF-ALIGNED PATTERNING WITH COLORED BLOCKING AND STRUCTURES RESULT...

CONTACT OVER ACTIVE GATE STRUCTURES WITH METAL OXIDE LAYERS TO INHI...

VIA CONTACT PATTERNING METHOD TO INCREASE EDGE PLACEMENT ERROR MARGIN

1D VERTICAL EDGE BLOCKING (VEB) VIA AND PLUG

CONDUCTIVE VIA AND METAL LINE END FABRICATION AND STRUCTURES RESULT...

GROUP IV METAL OR SEMICONDUCTOR NANOWIRE FABRIC