Rhonda Cassada

Person

Hillsborough, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-port RAM having functionally identical ports
- Patent number 6,167,487
- Issue date Dec 26, 2000
- Mitsubishi Electronics America, Inc.
- Stephen Camacho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Independent chip select for SRAM and DRAM in a multi-port RAM
- Patent number 6,157,990
- Issue date Dec 5, 2000
- Mitsubishi Electronics America Inc.
- William L. Randolph
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-port memory device having masking registers
- Patent number 6,101,579
- Issue date Aug 8, 2000
- Mitsubishi Semiconductor America, Inc.
- William L. Randolph
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Addressing system in a multi-port RAM having main and cache memories
- Patent number 6,088,760
- Issue date Jul 11, 2000
- Mitsubishi Semiconductor America, Inc.
- Robert M. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual clocking scheme in a multi-port RAM
- Patent number 5,959,937
- Issue date Sep 28, 1999
- Mitsubishi Semiconductor America, Inc.
- William L. Randolph
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RAM having multiple ports sharing common memory locations
- Patent number 5,946,262
- Issue date Aug 31, 1999
- Mitsubishi Semiconductor America, Inc.
- William L. Randolph
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-speed main amplifier with reduced access and output disable ti...
- Patent number 5,798,972
- Issue date Aug 25, 1998
- Mitsubishi Semiconductor America, Inc.
- Tim Lao
- G11 - INFORMATION STORAGE
Information Patent Grant
Latched DRAM write bus for quickly clearing DRAM array with minimum...
- Patent number 5,784,329
- Issue date Jul 21, 1998
- Mitsubishi Semiconductor America, Inc.
- Dennis Blankenship
- G11 - INFORMATION STORAGE

Rhonda Cassada

Person

Patents Grantslast 30 patents

Multi-port RAM having functionally identical ports

Independent chip select for SRAM and DRAM in a multi-port RAM

Multi-port memory device having masking registers

Addressing system in a multi-port RAM having main and cache memories

Dual clocking scheme in a multi-port RAM

RAM having multiple ports sharing common memory locations

High-speed main amplifier with reduced access and output disable ti...

Latched DRAM write bus for quickly clearing DRAM array with minimum...