Richard Westhoff

Person

Hudson, NH, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor heterostructures having reduced dislocation pile-ups...
- Patent number 9,934,964
- Issue date Apr 3, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Christopher Leitz
- C30 - CRYSTAL GROWTH
Information Patent Grant
Semiconductor heterostructures having reduced dislocation pile-ups...
- Patent number 9,309,607
- Issue date Apr 12, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Christopher Leitz
- C30 - CRYSTAL GROWTH
Information Patent Grant
Semiconductor heterostructures having reduced dislocation pile-ups...
- Patent number 8,823,056
- Issue date Sep 2, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Christopher Leitz
- C30 - CRYSTAL GROWTH
Information Patent Grant
Method of producing high quality relaxed silicon germanium layers
- Patent number 8,187,379
- Issue date May 29, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Eugene Fitzgerald
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Semiconductor heterostructures having reduced dislocation pile-ups...
- Patent number 8,129,747
- Issue date Mar 6, 2012
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Richard Westhoff
- C30 - CRYSTAL GROWTH
Information Patent Grant
Method of producing high quality relaxed silicon germanium layers
- Patent number 7,955,435
- Issue date Jun 7, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Eugene Fitzgerald
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Semiconductor heterostructures having reduced dislocation pile-ups...
- Patent number 7,829,442
- Issue date Nov 9, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Richard Westhoff
- C30 - CRYSTAL GROWTH
Information Patent Grant
Method of producing high quality relaxed silicon germanium layers
- Patent number 7,674,335
- Issue date Mar 9, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Eugene A. Fitzgerald
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Elevated source and drain elements for strained-channel heterojunti...
- Patent number 7,615,829
- Issue date Nov 10, 2009
- AmberWave Systems Corporation
- Anthony J. Lochtefeld
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduction of dislocation pile-up formation during relaxed lattice-m...
- Patent number 7,594,967
- Issue date Sep 29, 2009
- AmberWave Systems Corporation
- Christopher J. Vineis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor heterostructures having reduced dislocation pile-ups
- Patent number 7,375,385
- Issue date May 20, 2008
- AmberWave Systems Corporation
- Richard Westhoff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of fabricating semiconductor heterostructures
- Patent number 7,368,308
- Issue date May 6, 2008
- AmberWave Systems Corporation
- Christopher Vineis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structures with structural homogeneity
- Patent number 7,332,417
- Issue date Feb 19, 2008
- AmberWave Systems Corporation
- Richard Westhoff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor heterostructures and related methods
- Patent number 7,049,627
- Issue date May 23, 2006
- AmberWave Systems Corporation
- Christopher Vineis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of producing high quality relaxed silicon germanium layers
- Patent number 7,041,170
- Issue date May 9, 2006
- AmberWave Systems Corporation
- Eugene A. Fitzgerald
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method for pretreating dielectric layers to enhance the adhesion of...
- Patent number 6,482,477
- Issue date Nov 19, 2002
- Tokyo Electron Limited
- Richard C. Westhoff
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Heterostructures Having Reduced Dislocation Pile-Ups...
- Publication number 20160225609
- Publication date Aug 4, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Christopher Leitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Heterostructures Having Reduced Dislocation Pile-Ups...
- Publication number 20140338589
- Publication date Nov 20, 2014
- Christopher Leitz
- C30 - CRYSTAL GROWTH
Information Patent Application
Semiconductor Heterostructures Having Reduced Dislocation Pile-Ups...
- Publication number 20120104461
- Publication date May 3, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Christopher Leitz
- C30 - CRYSTAL GROWTH
Information Patent Application
Method of Producing High Quality Relaxed Silicon Germanium Layers
- Publication number 20110177681
- Publication date Jul 21, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Eugene A. Fitzgerald
- C30 - CRYSTAL GROWTH
Information Patent Application
Semiconductor Heterostructures Having Reduced Dislocation Pile-Ups...
- Publication number 20110012172
- Publication date Jan 20, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Christopher Leitz
- C30 - CRYSTAL GROWTH
Information Patent Application
Method of Producing High Quality Relaxed Silicon Germanium Layers
- Publication number 20100206216
- Publication date Aug 19, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Eugene A. Fitzgerald
- C30 - CRYSTAL GROWTH
Information Patent Application
SEMICONDUCTOR STRUCTURES WITH STRUCTURAL HOMOGENEITY
- Publication number 20080135830
- Publication date Jun 12, 2008
- AmberWave Systems Corporation
- Richard Westhoff
- C30 - CRYSTAL GROWTH
Information Patent Application
SEMICONDUCTOR HETEROSTRUCTURES HAVING REDUCED DISLOCATION PILE-UPS...
- Publication number 20080079024
- Publication date Apr 3, 2008
- Richard Westhoff
- C30 - CRYSTAL GROWTH
Information Patent Application
Method of producing high quality relaxed silicon germanium layers
- Publication number 20060174818
- Publication date Aug 10, 2006
- AmberWave Systems
- Eugene A. Fitzgerald
- C30 - CRYSTAL GROWTH
Information Patent Application
Methods of fabricating semiconductor heterostructures
- Publication number 20060009012
- Publication date Jan 12, 2006
- AmberWave Systems Corporation
- Christopher Leitz
- C30 - CRYSTAL GROWTH
Information Patent Application
Semiconductor structures with structural homogeneity
- Publication number 20040214407
- Publication date Oct 28, 2004
- AmberWave Systems Corporation
- Richard Westhoff
- C30 - CRYSTAL GROWTH
Information Patent Application
Semiconductor heterostructures and related methods
- Publication number 20040087117
- Publication date May 6, 2004
- AmberWave Systems Corporation
- Christopher Leitz
- C30 - CRYSTAL GROWTH
Information Patent Application
Semiconductor heterostructures having reduced dislocation pile-ups...
- Publication number 20040075105
- Publication date Apr 22, 2004
- AmberWave Systems Corporation
- Christopher Leitz
- C30 - CRYSTAL GROWTH
Information Patent Application
Reduction of dislocation pile-up formation during relaxed lattice-m...
- Publication number 20040040493
- Publication date Mar 4, 2004
- AmberWave Systems Corporation
- Christopher J. Vineis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of producing high quality relaxed silicon germanium layers
- Publication number 20030230233
- Publication date Dec 18, 2003
- Eugene A. Fitzgerald
- C30 - CRYSTAL GROWTH
Information Patent Application
Elevated source and drain elements for strained-channel heterojunti...
- Publication number 20030227029
- Publication date Dec 11, 2003
- AmberWave Systems Corporation
- Anthony J. Lochtefeld
- H01 - BASIC ELECTRIC ELEMENTS

Richard Westhoff

Person

Patents Grantslast 30 patents

Semiconductor heterostructures having reduced dislocation pile-ups...

Semiconductor heterostructures having reduced dislocation pile-ups...

Semiconductor heterostructures having reduced dislocation pile-ups...

Method of producing high quality relaxed silicon germanium layers

Semiconductor heterostructures having reduced dislocation pile-ups...

Method of producing high quality relaxed silicon germanium layers

Semiconductor heterostructures having reduced dislocation pile-ups...

Method of producing high quality relaxed silicon germanium layers

Elevated source and drain elements for strained-channel heterojunti...

Reduction of dislocation pile-up formation during relaxed lattice-m...

Semiconductor heterostructures having reduced dislocation pile-ups

Methods of fabricating semiconductor heterostructures

Semiconductor structures with structural homogeneity

Semiconductor heterostructures and related methods

Method of producing high quality relaxed silicon germanium layers

Method for pretreating dielectric layers to enhance the adhesion of...

Patents Applicationslast 30 patents

Semiconductor Heterostructures Having Reduced Dislocation Pile-Ups...

Semiconductor Heterostructures Having Reduced Dislocation Pile-Ups...

Semiconductor Heterostructures Having Reduced Dislocation Pile-Ups...

Method of Producing High Quality Relaxed Silicon Germanium Layers

Semiconductor Heterostructures Having Reduced Dislocation Pile-Ups...

Method of Producing High Quality Relaxed Silicon Germanium Layers

SEMICONDUCTOR STRUCTURES WITH STRUCTURAL HOMOGENEITY

SEMICONDUCTOR HETEROSTRUCTURES HAVING REDUCED DISLOCATION PILE-UPS...

Method of producing high quality relaxed silicon germanium layers

Methods of fabricating semiconductor heterostructures

Semiconductor structures with structural homogeneity

Semiconductor heterostructures and related methods

Semiconductor heterostructures having reduced dislocation pile-ups...

Reduction of dislocation pile-up formation during relaxed lattice-m...

Method of producing high quality relaxed silicon germanium layers

Elevated source and drain elements for strained-channel heterojunti...