Robert Anthony Ross Jr.

Person

Cedar Park, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and methods of automatic navigation on the world wide web
- Patent number 7,529,808
- Issue date May 5, 2009
- International Business Machines Corporation
- Matthew Bunkley Trevathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system having a unidirectional bus and method for communicat...
- Patent number 6,195,280
- Issue date Feb 27, 2001
- International Business Machines Corporation
- George McNeil Lattimore
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier/comparator circuit and data comparison method
- Patent number 6,191,620
- Issue date Feb 20, 2001
- International Business Machines Corporation
- George McNeil Lattimore
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system having a unidirectional bus and method for communicat...
- Patent number 6,081,458
- Issue date Jun 27, 2000
- International Business Machines Corp.
- George McNeil Lattimore
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory in a data processing system having improved performance and...
- Patent number 6,058,065
- Issue date May 2, 2000
- International Business Machines Corporation
- George McNeil Lattimore
- G11 - INFORMATION STORAGE
Information Patent Grant
Four device SRAM cell with single bitline
- Patent number 6,011,726
- Issue date Jan 4, 2000
- International Business Machines Corporation
- Kevin Arthur Batson
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for memory cell array boost amplifier
- Patent number 6,002,626
- Issue date Dec 14, 1999
- International Business Machines Corporation
- George McNeil Lattimore
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line boost amplifier
- Patent number 5,982,692
- Issue date Nov 9, 1999
- International Business Machines Corporation
- George McNeil Lattimore
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit switch circuit and bit line selection method
- Patent number 5,963,486
- Issue date Oct 5, 1999
- International Business Machines Corporation
- Gus Wai-Yen Yeung
- G11 - INFORMATION STORAGE
Information Patent Grant
Data processing system and method for implementing a multi-port mem...
- Patent number 5,956,286
- Issue date Sep 21, 1999
- International Business Machines Corporation
- George McNeil Lattimore
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for single clocked, non-overlapping access in...
- Patent number 5,907,508
- Issue date May 25, 1999
- International Business Machines Corporation
- George McNeil Lattimore
- G11 - INFORMATION STORAGE
Information Patent Grant
Wordline amplifier
- Patent number 5,892,704
- Issue date Apr 6, 1999
- International Business Machines Corporation
- George McNeil Lattimore
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory in a data processing system having uneven cell grouping on b...
- Patent number 5,892,725
- Issue date Apr 6, 1999
- International Business Machines Corporation
- George McNeil Lattimore
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system having a vertical bitline topology and method therefor
- Patent number 5,877,976
- Issue date Mar 2, 1999
- International Business Machines Corporation
- George McNeil Lattimore
- G11 - INFORMATION STORAGE
Information Patent Grant
Data processing system and method for generating memory control sig...
- Patent number 5,870,349
- Issue date Feb 9, 1999
- International Business Machines Corporation
- George McNeil Lattimore
- G11 - INFORMATION STORAGE
Information Patent Grant
Zero-write-cycle memory cell apparatus
- Patent number 5,808,933
- Issue date Sep 15, 1998
- International Business Machines Corporation
- Robert Anthony Ross
- G11 - INFORMATION STORAGE
Information Patent Grant
Four device SRAM cell with single bitline
- Patent number 5,805,496
- Issue date Sep 8, 1998
- International Business Machines Corporation
- Kevin Arthur Batson
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable high performance mode for multi-way associative cache/...
- Patent number 5,778,428
- Issue date Jul 7, 1998
- International Business Machines Corporation
- Kevin A. Batson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power clocked set/reset fast dynamic latch
- Patent number 5,646,566
- Issue date Jul 8, 1997
- International Business Machines Corporation
- Robert A. Ross
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor memory system having a write control circuit responsi...
- Patent number 5,530,677
- Issue date Jun 25, 1996
- International Business Machines Corporation
- David B. Grover
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory system having sense amplifier being activated...
- Patent number 5,511,031
- Issue date Apr 23, 1996
- International Business Machines Corporation
- David B. Grover
- G11 - INFORMATION STORAGE

Robert Anthony Ross Jr.

Person

Patents Grantslast 30 patents

Systems and methods of automatic navigation on the world wide web

Memory system having a unidirectional bus and method for communicat...

Sense amplifier/comparator circuit and data comparison method

Memory system having a unidirectional bus and method for communicat...

Memory in a data processing system having improved performance and...

Four device SRAM cell with single bitline

Method and apparatus for memory cell array boost amplifier

Bit line boost amplifier

Bit switch circuit and bit line selection method

Data processing system and method for implementing a multi-port mem...

Method and apparatus for single clocked, non-overlapping access in...

Wordline amplifier

Memory in a data processing system having uneven cell grouping on b...

Memory system having a vertical bitline topology and method therefor

Data processing system and method for generating memory control sig...

Zero-write-cycle memory cell apparatus

Four device SRAM cell with single bitline

Programmable high performance mode for multi-way associative cache/...

Low power clocked set/reset fast dynamic latch

Semiconductor memory system having a write control circuit responsi...

Semiconductor memory system having sense amplifier being activated...