Robert C. Burd

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Santa Clara, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Method and circuitry for an undisturbed scannable state element
- Patent number 6,380,724
- Issue date Apr 30, 2002
- Advanced Micro Devices, Inc.
- Eric W. Mahurin
- G01 - MEASURING TESTING
Information Patent Grant
Logic array having high frequency internal clocking
- Patent number RE35797
- Issue date May 19, 1998
- TriQuint Semiconductor, Inc.
- Andrew C. Graham
- 326 - Electronic digital logic circuitry
Information Patent Grant
Current mirror compensation circuit
- Patent number 5,212,458
- Issue date May 18, 1993
- TriQuint Semiconductor, Inc.
- Mark E. Fitzpatrick
- G05 - CONTROLLING REGULATING
Information Patent Grant
Circuit for limiting maximum frequency output of a voltage controll...
- Patent number 5,208,555
- Issue date May 4, 1993
- TriQuint Semiconductor, Inc.
- Andrew C. Graham
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Logic array having high frequency internal clocking
- Patent number 5,204,555
- Issue date Apr 20, 1993
- Gazelle Microcircuits, Inc.
- Andrew C. Graham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating transistor switch
- Patent number 5,004,971
- Issue date Apr 2, 1991
- Gazelle Microcircuits, Inc.
- Mark E. Fitzpatrick
- H03 - BASIC ELECTRONIC CIRCUITRY