Robert D. HERZL

Person

South Burlington, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Promotion of ERAT cache entries
- Patent number 11,221,957
- Issue date Jan 11, 2022
- International Business Machines Corporation
- Bartholomew Blaner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative checkin of ERAT cache entries
- Patent number 10,884,943
- Issue date Jan 5, 2021
- International Business Machines Corporation
- Bartholomew Blaner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Maintaining consistency between address translations in a data proc...
- Patent number 10,599,569
- Issue date Mar 24, 2020
- International Business Machines Corporation
- Bartholomew Blaner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Critical path delay prediction
- Patent number 10,169,500
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Margaret R. Charlebois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chip performance monitoring system and method
- Patent number 10,006,964
- Issue date Jun 26, 2018
- International Business Machines Corporation
- Margaret R. Charlebois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chip performance monitoring system and method
- Patent number 9,383,766
- Issue date Jul 5, 2016
- International Business Machines Corporation
- Margaret R. Charlebois
- G01 - MEASURING TESTING
Information Patent Grant
Termination of requests in a distributed coprocessor system
- Patent number 9,286,129
- Issue date Mar 15, 2016
- International Business Machines Corporation
- Brian Mitchell Bass
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible performance screen ring oscillator within a scan chain
- Patent number 9,188,643
- Issue date Nov 17, 2015
- GLOBALFOUNDRIES Inc.
- Margaret R. Charlebois
- G01 - MEASURING TESTING
Information Patent Grant
Performance screen ring oscillator formed from paired scan chains
- Patent number 9,128,151
- Issue date Sep 8, 2015
- International Business Machines Corporation
- Margaret R. Charlebois
- G01 - MEASURING TESTING
Information Patent Grant
Performance screen ring oscillator formed from multi-dimensional pa...
- Patent number 9,097,765
- Issue date Aug 4, 2015
- International Business Machines Corporation
- Margaret R. Charlebois
- G01 - MEASURING TESTING
Information Patent Grant
Ring oscillator
- Patent number 8,754,696
- Issue date Jun 17, 2014
- International Business Machines Corporation
- Margaret R. Charlebois
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Shadow registers for least recently used data in cache
- Patent number 8,667,223
- Issue date Mar 4, 2014
- International Business Machines Corporation
- Thomas B. Chadwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit design using design variable function slope sensitivity
- Patent number 8,464,199
- Issue date Jun 11, 2013
- International Business Machines Corporation
- Margaret R. Charlebois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor layer forming method and structure
- Patent number 8,341,588
- Issue date Dec 25, 2012
- International Business Machines Corporation
- Robert D. Herzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for identifying and implementing flexible logic block logic...
- Patent number 8,181,148
- Issue date May 15, 2012
- International Business Machines Corporation
- Robert D. Herzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structure for identifying and implementing flexible logic block log...
- Patent number 8,141,028
- Issue date Mar 20, 2012
- International Business Machines Corporation
- Robert D. Herzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimizing impact of design changes for integrated circuit designs
- Patent number 8,060,845
- Issue date Nov 15, 2011
- International Business Machines Corporation
- Robert D. Herzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of switching external models in an automated system-on-chip...
- Patent number 7,917,348
- Issue date Mar 29, 2011
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Design structure for facilitating engineering changes in integrated...
- Patent number 7,480,888
- Issue date Jan 20, 2009
- International Business Machines Corporation
- Clarence Rosser Ogilvie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of switching external models in an automated system-on-chip...
- Patent number 7,353,156
- Issue date Apr 1, 2008
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for re-using system-on-chip verification software in an oper...
- Patent number 6,868,545
- Issue date Mar 15, 2005
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor-independent system-on-chip verification for embedded proc...
- Patent number 6,615,167
- Issue date Sep 2, 2003
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of developing re-usable software for efficient verification...
- Patent number 6,539,522
- Issue date Mar 25, 2003
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of controlling external models in system-on-chip verification
- Patent number 6,487,699
- Issue date Nov 26, 2002
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Real time invariant behavior cache
- Patent number 6,157,981
- Issue date Dec 5, 2000
- International Business Machines Corporation
- Bartholomew Blaner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bidirectional data bus reservation priority controls having token l...
- Patent number 5,953,510
- Issue date Sep 14, 1999
- International Business Machines Corporation
- Robert Dov Herzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus to guarantee TLB inclusion for store operations
- Patent number 5,930,832
- Issue date Jul 27, 1999
- International Business Machines Corporation
- Jay Gerald Heaslip
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reservation of data buses between multiple...
- Patent number 5,835,714
- Issue date Nov 10, 1998
- International Business Machines Corporation
- Robert Dov Herzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross interrogate synchronization mechanism including logic means a...
- Patent number 5,361,368
- Issue date Nov 1, 1994
- International Business Machines Corporation
- Robert D. Herzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor system with improved memory transfer means
- Patent number 5,269,009
- Issue date Dec 7, 1993
- International Business Machines Corporation
- Robert D. Herzl
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SPECULATIVE CHECKIN OF ERAT CACHE ENTRIES
- Publication number 20200073816
- Publication date Mar 5, 2020
- International Business Machines Corporation
- Bartholomew Blaner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROMOTION OF ERAT CACHE ENTRIES
- Publication number 20200073817
- Publication date Mar 5, 2020
- International Business Machines Corporation
- Bartholomew Blaner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR MAINTAINING CONSISTENCY BETWEEN ADDRESS TRANSLATIONS...
- Publication number 20170371789
- Publication date Dec 28, 2017
- International Business Machines Corporation
- BARTHOLOMEW BLANER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHIP PERFORMANCE MONITORING SYSTEM AND METHOD
- Publication number 20160231379
- Publication date Aug 11, 2016
- International Business Machines Corporation
- Margaret R. Charlebois
- G01 - MEASURING TESTING
Information Patent Application
Termination of Requests in a Distributed Coprocessor System
- Publication number 20140337855
- Publication date Nov 13, 2014
- International Business Machines Corporation
- Brian Mitchell Bass
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHIP PERFORMANCE MONITORING SYSTEM AND METHOD
- Publication number 20140195196
- Publication date Jul 10, 2014
- International Business Machines Corporation
- Margaret R. Charlebois
- G01 - MEASURING TESTING
Information Patent Application
FLEXIBLE PERFORMANCE SCREEN RING OSCILLATOR WITHIN A SCAN CHAIN
- Publication number 20140132290
- Publication date May 15, 2014
- International Business Machines Corporation
- Margaret R. Charlebois
- G01 - MEASURING TESTING
Information Patent Application
RING OSCILLATOR
- Publication number 20140028365
- Publication date Jan 30, 2014
- International Business Machines Corporation
- Margaret R. Charlebois
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CRITICAL PATH DELAY PREDICTION
- Publication number 20130041608
- Publication date Feb 14, 2013
- International Business Machines Corporation
- Margaret R. Charlebois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHADOW REGISTERS FOR LEAST RECENTLY USED DATA IN CACHE
- Publication number 20130042068
- Publication date Feb 14, 2013
- International Business Machines Corporation
- Thomas B. Chadwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE FOR IDENTIFYING AND IMPLEMENTING FLEXIBLE LOGIC B...
- Publication number 20120167022
- Publication date Jun 28, 2012
- International Business Machines Corporation
- Robert D. HERZL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR LAYER FORMING METHOD AND STRUCTURE
- Publication number 20120083913
- Publication date Apr 5, 2012
- International Business Machines Corporation
- Robert D. Herzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Minimizing Impact of Design Changes For Integrated Circu...
- Publication number 20100017773
- Publication date Jan 21, 2010
- International Business Machines Corporation
- Robert D. HERZL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DESIGN STRUCTURE FOR IDENTIFYING AND IMPLEMENTING FLEXIBLE LOGIC BL...
- Publication number 20090183134
- Publication date Jul 16, 2009
- International Business Machines Corporation
- Robert D. HERZL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Device for Identifying and Implementing Flexible Logic B...
- Publication number 20090183135
- Publication date Jul 16, 2009
- Robert D. Herzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASIC LOGIC LIBRARY OF FLEXIBLE LOGIC BLOCKS AND METHOD TO ENABLE EN...
- Publication number 20090045839
- Publication date Feb 19, 2009
- International Business Machines Corporation
- Robert D. HERZL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASIC LOGIC LIBRARY OF FLEXIBLE LOGIC BLOCKS AND METHOD TO ENABLE EN...
- Publication number 20090045836
- Publication date Feb 19, 2009
- Robert D. Herzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF SWITCHING EXTERNAL MODELS IN AN AUTOMATED SYSTEM-ON-CHIP...
- Publication number 20080133206
- Publication date Jun 5, 2008
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of switching external models in an automated system-on-chip...
- Publication number 20030149946
- Publication date Aug 7, 2003
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING

Robert D. HERZL

Person

Patents Grantslast 30 patents

Promotion of ERAT cache entries

Speculative checkin of ERAT cache entries

Maintaining consistency between address translations in a data proc...

Critical path delay prediction

Chip performance monitoring system and method

Chip performance monitoring system and method

Termination of requests in a distributed coprocessor system

Flexible performance screen ring oscillator within a scan chain

Performance screen ring oscillator formed from paired scan chains

Performance screen ring oscillator formed from multi-dimensional pa...

Ring oscillator

Shadow registers for least recently used data in cache

Circuit design using design variable function slope sensitivity

Semiconductor layer forming method and structure

Method for identifying and implementing flexible logic block logic...

Structure for identifying and implementing flexible logic block log...

Minimizing impact of design changes for integrated circuit designs

Method of switching external models in an automated system-on-chip...

Design structure for facilitating engineering changes in integrated...

Method of switching external models in an automated system-on-chip...

Method for re-using system-on-chip verification software in an oper...

Processor-independent system-on-chip verification for embedded proc...

Method of developing re-usable software for efficient verification...

Method of controlling external models in system-on-chip verification

Real time invariant behavior cache

Bidirectional data bus reservation priority controls having token l...

Apparatus to guarantee TLB inclusion for store operations

Method and apparatus for reservation of data buses between multiple...

Cross interrogate synchronization mechanism including logic means a...

Processor system with improved memory transfer means

Patents Applicationslast 30 patents

SPECULATIVE CHECKIN OF ERAT CACHE ENTRIES

PROMOTION OF ERAT CACHE ENTRIES

TECHNIQUES FOR MAINTAINING CONSISTENCY BETWEEN ADDRESS TRANSLATIONS...

CHIP PERFORMANCE MONITORING SYSTEM AND METHOD

Termination of Requests in a Distributed Coprocessor System

CHIP PERFORMANCE MONITORING SYSTEM AND METHOD

FLEXIBLE PERFORMANCE SCREEN RING OSCILLATOR WITHIN A SCAN CHAIN

RING OSCILLATOR

CRITICAL PATH DELAY PREDICTION

SHADOW REGISTERS FOR LEAST RECENTLY USED DATA IN CACHE

METHOD AND DEVICE FOR IDENTIFYING AND IMPLEMENTING FLEXIBLE LOGIC B...

SEMICONDUCTOR LAYER FORMING METHOD AND STRUCTURE

Method for Minimizing Impact of Design Changes For Integrated Circu...

DESIGN STRUCTURE FOR IDENTIFYING AND IMPLEMENTING FLEXIBLE LOGIC BL...

Method and Device for Identifying and Implementing Flexible Logic B...

ASIC LOGIC LIBRARY OF FLEXIBLE LOGIC BLOCKS AND METHOD TO ENABLE EN...

ASIC LOGIC LIBRARY OF FLEXIBLE LOGIC BLOCKS AND METHOD TO ENABLE EN...

METHOD OF SWITCHING EXTERNAL MODELS IN AN AUTOMATED SYSTEM-ON-CHIP...

Method of switching external models in an automated system-on-chip...