Robert Feurle

Person

Neubiberg, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Photolithographic mask
- Patent number 7,078,133
- Issue date Jul 18, 2006
- Infineon Technologies AG
- Lothar Bauch
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Memory, processor system and method for performing write operations...
- Patent number 6,922,764
- Issue date Jul 26, 2005
- Infineon Technologies AG
- Jean-Marc Dortu
- G11 - INFORMATION STORAGE
Information Patent Grant
Sharing of multiple-access signal line in a printed circuit board
- Patent number 6,894,379
- Issue date May 17, 2005
- Infineon Technologies AG
- Robert Feurle
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated semiconductor circuit having transistors that are switch...
- Patent number 6,816,432
- Issue date Nov 9, 2004
- Infineon Technologies AG
- Robert Feurle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Printed circuit board for semiconductor memory device
- Patent number 6,781,220
- Issue date Aug 24, 2004
- Infineon Technologies AG
- Andreas Täube
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated dynamic memory with control circuit for controlling a re...
- Patent number 6,768,693
- Issue date Jul 27, 2004
- Infineon Technologies AG
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Grant
Volatile semiconductor memory and mobile device
- Patent number 6,751,145
- Issue date Jun 15, 2004
- Infineon Technologies AG
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory
- Patent number 6,728,143
- Issue date Apr 27, 2004
- Infineon Technologies AG
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated dynamic memory device and method for operating an integr...
- Patent number 6,707,705
- Issue date Mar 16, 2004
- Infineon Technologies AG
- Paul Schmölz
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory having a plurality of memory cell arrays and meth...
- Patent number 6,700,831
- Issue date Mar 2, 2004
- Infineon Technologies AG
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory chip with a dynamic memory
- Patent number 6,646,908
- Issue date Nov 11, 2003
- Infineon Technologies AG
- Andreas Täuber
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory having a plurality of memory cell arrays
- Patent number 6,643,211
- Issue date Nov 4, 2003
- Infineon Technologies AG
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Grant
Data memory
- Patent number 6,639,825
- Issue date Oct 28, 2003
- Infineon Technologies AG
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Grant
Data output interface, in particular for semiconductor memories
- Patent number 6,628,553
- Issue date Sep 30, 2003
- Infineon Technologies AG
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor chip configuration and method of controlling a semico...
- Patent number 6,615,289
- Issue date Sep 2, 2003
- Infineon Technologies AG
- Robert Feurle
- G01 - MEASURING TESTING
Information Patent Grant
Voltage regulating circuit, in particular for semiconductor memories
- Patent number 6,614,706
- Issue date Sep 2, 2003
- Infineon Technologies AG
- Robert Feurle
- G05 - CONTROLLING REGULATING
Information Patent Grant
Dicing configuration for separating a semiconductor component from...
- Patent number 6,528,392
- Issue date Mar 4, 2003
- Infineon Technologies AG
- Robert Feurle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Configuration and method for connecting conductor tracks
- Patent number 6,492,729
- Issue date Dec 10, 2002
- Infineon Technologies AG
- Robert Feurle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Input buffer of an integrated semiconductor circuit
- Patent number 6,480,039
- Issue date Nov 12, 2002
- Infineon Technologies AG
- Robert Feurle
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated memory having memory cells and buffer capacitors
- Patent number 6,456,522
- Issue date Sep 24, 2002
- Infineon Technologies AG
- Robert Feurle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory configuration with dummy components on continu...
- Patent number 6,441,469
- Issue date Aug 27, 2002
- Infineon Technologies AG
- Athanasia Chrysostomides
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Configuration for reducing the number of measuring pads on a semico...
- Patent number 6,433,617
- Issue date Aug 13, 2002
- Infineon Technologies AG
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory with a buffer circuit
- Patent number 6,426,899
- Issue date Jul 30, 2002
- Infineon Technologies AG
- Dominique Savignac
- G11 - INFORMATION STORAGE
Information Patent Grant
Buffer circuit
- Patent number 6,317,378
- Issue date Nov 13, 2001
- Infineon Technologies AG
- Dominique Savignac
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method for operating a current sense amplifier
- Patent number 6,317,374
- Issue date Nov 13, 2001
- Infineon Technologies AG
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory configuration with a bit-line twist
- Patent number 6,310,399
- Issue date Oct 30, 2001
- Infineon Technologies AG
- Robert Feurle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with electrical connection points that can be se...
- Patent number 6,302,729
- Issue date Oct 16, 2001
- Infineon Technologies AG
- Jens Möckel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated semiconductor circuit having dummy structures
- Patent number 6,294,841
- Issue date Sep 25, 2001
- Siemens Aktiengesellschaft
- Dominique Savignac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated semiconductor circuit configuration having stabilized co...
- Patent number 6,281,586
- Issue date Aug 28, 2001
- Infineon Technologies AG
- Robert Feurle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sense amplifier configuration with fused diffusion regions and a di...
- Patent number 6,240,005
- Issue date May 29, 2001
- Infineon Technologies AG
- Athanasia Chrysostomides
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Integrated dynamic memory with control circuit for controlling a re...
- Publication number 20030156483
- Publication date Aug 21, 2003
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Application
Photolithographic mask
- Publication number 20030152846
- Publication date Aug 14, 2003
- Lothar Bauch
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Memory, processor system and method for performing write operations...
- Publication number 20030126382
- Publication date Jul 3, 2003
- Jean-Marc Dortu
- G11 - INFORMATION STORAGE
Information Patent Application
Sharing of multiple-access signal line in a printed circuit board
- Publication number 20030089982
- Publication date May 15, 2003
- Robert Feurle
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Semiconductor memory apparatus
- Publication number 20030086301
- Publication date May 8, 2003
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Application
Volatile semiconductor memory and mobile device
- Publication number 20030043674
- Publication date Mar 6, 2003
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Application
Printed circuit board for semiconductor memory device
- Publication number 20030030995
- Publication date Feb 13, 2003
- Andreas Taube
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Test configuration for a parallel functional testing of semiconduct...
- Publication number 20020199139
- Publication date Dec 26, 2002
- Jean-Marc Dortu
- G11 - INFORMATION STORAGE
Information Patent Application
Data output interface, in particular for semiconductor memories
- Publication number 20020181290
- Publication date Dec 5, 2002
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated semiconductor circuit having transistors that are switch...
- Publication number 20020172071
- Publication date Nov 21, 2002
- Robert Feurle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated memory
- Publication number 20020172085
- Publication date Nov 21, 2002
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Application
Data memory
- Publication number 20020167832
- Publication date Nov 14, 2002
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory chip with a dynamic memory
- Publication number 20020141230
- Publication date Oct 3, 2002
- Andreas Tauber
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated dynamic memory device and method for operating an integr...
- Publication number 20020141229
- Publication date Oct 3, 2002
- Paul Schmolz
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory having a plurality of memory cell arrays
- Publication number 20020122345
- Publication date Sep 5, 2002
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory having a plurality of memory cell arrays and meth...
- Publication number 20020110043
- Publication date Aug 15, 2002
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Application
Voltage regulating circuit, in particular for semiconductor memories
- Publication number 20020080675
- Publication date Jun 27, 2002
- Robert Feurle
- G05 - CONTROLLING REGULATING
Information Patent Application
Integrated memory having memory cells and buffer capacitors
- Publication number 20020036916
- Publication date Mar 28, 2002
- Robert Feurle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit with electrical connection points that can be se...
- Publication number 20010019910
- Publication date Sep 6, 2001
- Jens Mockel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Configuration for testing a multiplicity of semiconductor chips
- Publication number 20010005144
- Publication date Jun 28, 2001
- Robert Feurle
- G01 - MEASURING TESTING
Information Patent Application
Dicing configuration for separating a semiconductor component from...
- Publication number 20010005617
- Publication date Jun 28, 2001
- Robert Feurle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for operating a current sense amplifier
- Publication number 20010004334
- Publication date Jun 21, 2001
- Robert Feurle
- G11 - INFORMATION STORAGE

Robert Feurle

Person

Patents Grantslast 30 patents

Photolithographic mask

Memory, processor system and method for performing write operations...

Sharing of multiple-access signal line in a printed circuit board

Integrated semiconductor circuit having transistors that are switch...

Printed circuit board for semiconductor memory device

Integrated dynamic memory with control circuit for controlling a re...

Volatile semiconductor memory and mobile device

Integrated memory

Integrated dynamic memory device and method for operating an integr...

Integrated memory having a plurality of memory cell arrays and meth...

Integrated memory chip with a dynamic memory

Integrated memory having a plurality of memory cell arrays

Data memory

Data output interface, in particular for semiconductor memories

Semiconductor chip configuration and method of controlling a semico...

Voltage regulating circuit, in particular for semiconductor memories

Dicing configuration for separating a semiconductor component from...

Configuration and method for connecting conductor tracks

Input buffer of an integrated semiconductor circuit

Integrated memory having memory cells and buffer capacitors

Semiconductor memory configuration with dummy components on continu...

Configuration for reducing the number of measuring pads on a semico...

Integrated memory with a buffer circuit

Buffer circuit

Method for operating a current sense amplifier

Semiconductor memory configuration with a bit-line twist

Integrated circuit with electrical connection points that can be se...

Integrated semiconductor circuit having dummy structures

Integrated semiconductor circuit configuration having stabilized co...

Sense amplifier configuration with fused diffusion regions and a di...

Patents Applicationslast 30 patents

Integrated dynamic memory with control circuit for controlling a re...

Photolithographic mask

Memory, processor system and method for performing write operations...

Sharing of multiple-access signal line in a printed circuit board

Semiconductor memory apparatus

Volatile semiconductor memory and mobile device

Printed circuit board for semiconductor memory device

Test configuration for a parallel functional testing of semiconduct...

Data output interface, in particular for semiconductor memories

Integrated semiconductor circuit having transistors that are switch...

Integrated memory

Data memory

Integrated memory chip with a dynamic memory

Integrated dynamic memory device and method for operating an integr...

Integrated memory having a plurality of memory cell arrays

Integrated memory having a plurality of memory cell arrays and meth...

Voltage regulating circuit, in particular for semiconductor memories

Integrated memory having memory cells and buffer capacitors

Integrated circuit with electrical connection points that can be se...

Configuration for testing a multiplicity of semiconductor chips

Dicing configuration for separating a semiconductor component from...

Method for operating a current sense amplifier