Robert L. Kanzelman

Person

Rochester, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Optimization of arithmetic expressions
- Patent number 11,922,130
- Issue date Mar 5, 2024
- International Business Machines Corporation
- Mihir Choudhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Grouping and partitioning of properties for logic verification
- Patent number 10,789,403
- Issue date Sep 29, 2020
- International Business Machines Corporation
- Rohit Dureja
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Initial-state and next-state value folding
- Patent number 10,621,297
- Issue date Apr 14, 2020
- International Business Machines Coporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Equivalency verification for hierarchical references
- Patent number 10,565,338
- Issue date Feb 18, 2020
- International Business Machines Corporation
- Ali S. El-Zein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verification complexity reduction via range-preserving input-to-con...
- Patent number 10,540,468
- Issue date Jan 21, 2020
- International Business Machines Corporation
- Raj Kumar Gajavelly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for scalable liveness verification via abstraction refinement
- Patent number 9,483,595
- Issue date Nov 1, 2016
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and program product for scalable liveness verification via a...
- Patent number 9,471,734
- Issue date Oct 18, 2016
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficiently determining Boolean satisfiability with lazy constraints
- Patent number 9,280,626
- Issue date Mar 8, 2016
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing a netlist circuit representation by leveraging binary de...
- Patent number 8,799,837
- Issue date Aug 5, 2014
- International Business Machines Corporation
- Jason Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Constructing inductive counterexamples in a multi-algorithm verific...
- Patent number 8,589,837
- Issue date Nov 19, 2013
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficiently determining boolean satisfiability with lazy constraints
- Patent number 8,589,327
- Issue date Nov 19, 2013
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for optimal diameter bounding of designs with com...
- Patent number 8,578,311
- Issue date Nov 5, 2013
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for optimal counterexample-guided proof-based abs...
- Patent number 8,527,922
- Issue date Sep 3, 2013
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhancing redundancy removal with early merging
- Patent number 8,484,591
- Issue date Jul 9, 2013
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tracking array data contents across three-valued read and write ope...
- Patent number 8,478,574
- Issue date Jul 2, 2013
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for design simplification through implication-bas...
- Patent number 8,418,093
- Issue date Apr 9, 2013
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for employing retiming and transient simplification on n...
- Patent number 8,418,106
- Issue date Apr 9, 2013
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logical circuit netlist reduction and model simplification using si...
- Patent number 8,418,119
- Issue date Apr 9, 2013
- International Business Machines Corporation
- Michael L. Case
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhancing redundancy removal with early merging
- Patent number 8,413,091
- Issue date Apr 2, 2013
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for boolean equivalency checking in the prese...
- Patent number 8,407,638
- Issue date Mar 26, 2013
- International Business Machines Corporation
- Victor A. Acuna
- G01 - MEASURING TESTING
Information Patent Grant
Eliminating, coalescing, or bypassing ports in memory array represe...
- Patent number 8,336,016
- Issue date Dec 18, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for analysis of logic designs with transient logic
- Patent number 8,327,302
- Issue date Dec 4, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimizing memory array representations for enhanced synthesis and...
- Patent number 8,307,313
- Issue date Nov 6, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Array concatenation in an integrated circuit design
- Patent number 8,291,359
- Issue date Oct 16, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimal correlated array abstraction
- Patent number 8,245,166
- Issue date Aug 14, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing minimization of input count during structural netlist ov...
- Patent number 8,185,852
- Issue date May 22, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced analysis of array-based netlists via reparameterization
- Patent number 8,181,131
- Issue date May 15, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient Redundancy Identification, Redundancy Removal, and Sequen...
- Patent number 8,146,034
- Issue date Mar 27, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Trace containment detection of combinational designs via constraint...
- Patent number 8,122,403
- Issue date Feb 21, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system and application for sequential cofactor-based analys...
- Patent number 8,042,075
- Issue date Oct 18, 2011
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SCALABLE, OPTIMAL RETIMING OF MULTI-CLOCKED NETLISTS
- Publication number 20240386172
- Publication date Nov 21, 2024
- International Business Machines Corporation
- Jason Raymond BAUMGARTNER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE, OPTIMAL RETIMING OF MULTI-CLOCKED NETLISTS
- Publication number 20240386173
- Publication date Nov 21, 2024
- International Business Machines Corporation
- Jason Raymond BAUMGARTNER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EQUIVALENCE CHECKING OF SYNTHESIZED LOGIC DESIGNS USING GENERATED S...
- Publication number 20230394212
- Publication date Dec 7, 2023
- International Business Machines Corporation
- Alexander IVRII
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZATION OF ARITHMETIC EXPRESSIONS
- Publication number 20230185528
- Publication date Jun 15, 2023
- International Business Machines Corporation
- MIHIR CHOUDHURY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REFINEMENT OF AN INTEGRATED CIRCUIT DESIGN
- Publication number 20230072735
- Publication date Mar 9, 2023
- International Business Machines Corporation
- Ali S. El-Zein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INITIAL-STATE AND NEXT-STATE VALUE FOLDING
- Publication number 20200104434
- Publication date Apr 2, 2020
- International Business Machines Corporation
- Jason R. BAUMGARTNER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VERIFICATION COMPLEXITY REDUCTION VIA RANGE-PRESERVING INPUT-TO-CON...
- Publication number 20200019653
- Publication date Jan 16, 2020
- International Business Machines Corporation
- Raj Kumar Gajavelly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EQUIVALENCY VERIFICATION FOR HIERARCHICAL REFERENCES
- Publication number 20190179974
- Publication date Jun 13, 2019
- International Business Machines Corporation
- Ali S. El-Zein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE LIVENESS VERIFICATION VIA ABSTRACTION REFINEMENT
- Publication number 20160210389
- Publication date Jul 21, 2016
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE LIVENESS VERIFICATION VIA ABSTRACTION REFINEMENT
- Publication number 20160210388
- Publication date Jul 21, 2016
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR OPTIMAL DIAMETER BOUNDING OF DESIGNS WITH COM...
- Publication number 20130305197
- Publication date Nov 14, 2013
- IBM Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONSTRUCTING INDUCTIVE COUNTEREXAMPLES IN A MULTI-ALGORITHM VERIFIC...
- Publication number 20130290918
- Publication date Oct 31, 2013
- IBM Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGICAL CIRCUIT NETLIST REDUCTION AND MODEL SIMPLIFICATION USING SI...
- Publication number 20120290992
- Publication date Nov 15, 2012
- International Business Machines Corporation
- Michael L. Case
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REACHABILITY ANALYSIS BY LOGICAL CIRCUIT SIMULATION FOR PROVIDING O...
- Publication number 20120290282
- Publication date Nov 15, 2012
- International Business Machines Corporation
- Michael L. Case
Information Patent Application
Efficiently Determining Boolean Satisfiability with Lazy Constraints
- Publication number 20120271786
- Publication date Oct 25, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhancing Redundancy Removal with Early Merging
- Publication number 20120272198
- Publication date Oct 25, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficiently Determining Boolean Satisfiability with Lazy Constraints
- Publication number 20120271792
- Publication date Oct 25, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhancing Redundancy Removal with Early Merging
- Publication number 20120272197
- Publication date Oct 25, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimal Correlated Array Abstraction
- Publication number 20120054701
- Publication date Mar 1, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques for Employing Retiming and Transient Simplification on N...
- Publication number 20120054702
- Publication date Mar 1, 2012
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Minimizing Memory Array Representations for Enhanced Synthesis and...
- Publication number 20110276930
- Publication date Nov 10, 2011
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Eliminating, Coalescing, or Bypassing Ports in Memory Array Represe...
- Publication number 20110276931
- Publication date Nov 10, 2011
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Array Concatenation in an Integrated Circuit Design
- Publication number 20110276932
- Publication date Nov 10, 2011
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Tracking Array Data Contents Across Three-Valued Read and Write Ope...
- Publication number 20110270597
- Publication date Nov 3, 2011
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced Analysis of Array-Based Netlists via Reparameterization
- Publication number 20110271244
- Publication date Nov 3, 2011
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient Redundancy Identification, Redundancy Removal, and Sequen...
- Publication number 20110271242
- Publication date Nov 3, 2011
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR ANALYSIS OF LOGIC DESIGNS WITH TRANSIENT LOGIC
- Publication number 20110093825
- Publication date Apr 21, 2011
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Design Simplification Through Implication-Bas...
- Publication number 20100293513
- Publication date Nov 18, 2010
- International Business Machines Corporation
- JASON R. BAUMGARTNER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Trace Containment Detection of Combinational Designs via Constraint...
- Publication number 20100269077
- Publication date Oct 21, 2010
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM AND APPLICATION FOR SEQUENTIAL COFACTOR-BASED ANALYS...
- Publication number 20100251197
- Publication date Sep 30, 2010
- International Business Machines Corporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING

Robert L. Kanzelman

Person

Patents Grantslast 30 patents

Optimization of arithmetic expressions

Grouping and partitioning of properties for logic verification

Initial-state and next-state value folding

Equivalency verification for hierarchical references

Verification complexity reduction via range-preserving input-to-con...

Method for scalable liveness verification via abstraction refinement

System and program product for scalable liveness verification via a...

Efficiently determining Boolean satisfiability with lazy constraints

Optimizing a netlist circuit representation by leveraging binary de...

Constructing inductive counterexamples in a multi-algorithm verific...

Efficiently determining boolean satisfiability with lazy constraints

Method and system for optimal diameter bounding of designs with com...

Method and system for optimal counterexample-guided proof-based abs...

Enhancing redundancy removal with early merging

Tracking array data contents across three-valued read and write ope...

Method and system for design simplification through implication-bas...

Techniques for employing retiming and transient simplification on n...

Logical circuit netlist reduction and model simplification using si...

Enhancing redundancy removal with early merging

Methods and apparatus for boolean equivalency checking in the prese...

Eliminating, coalescing, or bypassing ports in memory array represe...

Techniques for analysis of logic designs with transient logic

Minimizing memory array representations for enhanced synthesis and...

Array concatenation in an integrated circuit design

Optimal correlated array abstraction

Performing minimization of input count during structural netlist ov...

Enhanced analysis of array-based netlists via reparameterization

Efficient Redundancy Identification, Redundancy Removal, and Sequen...

Trace containment detection of combinational designs via constraint...

Method, system and application for sequential cofactor-based analys...

Patents Applicationslast 30 patents

SCALABLE, OPTIMAL RETIMING OF MULTI-CLOCKED NETLISTS

SCALABLE, OPTIMAL RETIMING OF MULTI-CLOCKED NETLISTS

EQUIVALENCE CHECKING OF SYNTHESIZED LOGIC DESIGNS USING GENERATED S...

OPTIMIZATION OF ARITHMETIC EXPRESSIONS

REFINEMENT OF AN INTEGRATED CIRCUIT DESIGN

INITIAL-STATE AND NEXT-STATE VALUE FOLDING

VERIFICATION COMPLEXITY REDUCTION VIA RANGE-PRESERVING INPUT-TO-CON...

EQUIVALENCY VERIFICATION FOR HIERARCHICAL REFERENCES

SCALABLE LIVENESS VERIFICATION VIA ABSTRACTION REFINEMENT

SCALABLE LIVENESS VERIFICATION VIA ABSTRACTION REFINEMENT

METHOD AND SYSTEM FOR OPTIMAL DIAMETER BOUNDING OF DESIGNS WITH COM...

CONSTRUCTING INDUCTIVE COUNTEREXAMPLES IN A MULTI-ALGORITHM VERIFIC...

LOGICAL CIRCUIT NETLIST REDUCTION AND MODEL SIMPLIFICATION USING SI...

REACHABILITY ANALYSIS BY LOGICAL CIRCUIT SIMULATION FOR PROVIDING O...

Efficiently Determining Boolean Satisfiability with Lazy Constraints

Enhancing Redundancy Removal with Early Merging

Efficiently Determining Boolean Satisfiability with Lazy Constraints

Enhancing Redundancy Removal with Early Merging

Optimal Correlated Array Abstraction

Techniques for Employing Retiming and Transient Simplification on N...

Minimizing Memory Array Representations for Enhanced Synthesis and...

Eliminating, Coalescing, or Bypassing Ports in Memory Array Represe...

Array Concatenation in an Integrated Circuit Design

Tracking Array Data Contents Across Three-Valued Read and Write Ope...

Enhanced Analysis of Array-Based Netlists via Reparameterization

Efficient Redundancy Identification, Redundancy Removal, and Sequen...

TECHNIQUES FOR ANALYSIS OF LOGIC DESIGNS WITH TRANSIENT LOGIC

Method and System for Design Simplification Through Implication-Bas...

Trace Containment Detection of Combinational Designs via Constraint...

METHOD, SYSTEM AND APPLICATION FOR SEQUENTIAL COFACTOR-BASED ANALYS...