Robert Richard Noel Bielby

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method for routing of signals
- Patent number 8,912,831
- Issue date Dec 16, 2014
- Altera Corporation
- Kerry Veenstra
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for routing of signals
- Patent number 8,233,577
- Issue date Jul 31, 2012
- Altera Corporation
- Kerry Veenstra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method for low power routing of signals in a low volt...
- Patent number 7,593,499
- Issue date Sep 22, 2009
- Altera Corporation
- Kerry Veenstra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method for low power routing of signals in a Low Volt...
- Patent number 6,956,920
- Issue date Oct 18, 2005
- Altera Corporation
- Kerry Veenstra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Programmable logic array integrated circuit devices
- Patent number 6,815,981
- Issue date Nov 9, 2004
- Altera Corporation
- Richard G. Cliff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programming circuits and techniques for programmable logic
- Patent number 6,636,936
- Issue date Oct 21, 2003
- Altera Corporation
- Richard Shaw Terrill
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase-locked loop circuitry for programmable logic devices
- Patent number 6,469,553
- Issue date Oct 22, 2002
- Altera Corporation
- Chiakang Sung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase-locked loop or delay-locked loop circuitry for programmable l...
- Patent number 6,437,650
- Issue date Aug 20, 2002
- Altera Corporation
- Chiakang Sung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic array integrated circuit devices
- Patent number 6,392,438
- Issue date May 21, 2002
- Altera Corporation
- Richard G. Cliff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for programming programmable logic array devices
- Patent number 6,384,630
- Issue date May 7, 2002
- Altera Corporation
- Richard G. Cliff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable voltage regulator
- Patent number 6,366,224
- Issue date Apr 2, 2002
- Altera Corporation
- Richard Cliff
- G05 - CONTROLLING REGULATING
Information Patent Grant
Phase-locked loop or delay-locked loop circuitry for programmable l...
- Patent number 6,271,729
- Issue date Aug 7, 2001
- Altera Corporation
- Chiakang Sung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory cells configurable as CAM or RAM in programmable logic devices
- Patent number 6,263,400
- Issue date Jul 17, 2001
- Altera Corporation
- Krishna Rangasayee
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing I/O noise when leaving programming mode
- Patent number 6,242,941
- Issue date Jun 5, 2001
- Altera Corporation
- W. Bradley Vest
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for programmably providing a power supply volt...
- Patent number 6,232,893
- Issue date May 15, 2001
- Altera Corporation
- Richard Cliff
- G05 - CONTROLLING REGULATING
Information Patent Grant
Phase-locked loop circuitry for programmable logic devices
- Patent number 6,218,876
- Issue date Apr 17, 2001
- Altera Corporation
- Chiakang Sung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for programming programmable logic array devices
- Patent number 6,191,608
- Issue date Feb 20, 2001
- Altera Corporation
- Richard G. Cliff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase-locked loop or delay-locked loop circuitry for programmable l...
- Patent number 6,177,844
- Issue date Jan 23, 2001
- Altera Corporation
- Chiakang Sung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device with selectable schmitt-triggered and thr...
- Patent number 6,163,166
- Issue date Dec 19, 2000
- Altera Corporation
- Robert Bielby
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device architecture incorporating a dedicated cr...
- Patent number 6,060,903
- Issue date May 9, 2000
- Altera Corporation
- Krishna Rangasayee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory cells configurable as CAM or RAM in programmable logic devices
- Patent number 6,058,452
- Issue date May 2, 2000
- Altera Corporation
- Krishna Rangasayee
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming circuits and techniques for programmable logic
- Patent number 6,052,755
- Issue date Apr 18, 2000
- Altera Corporation
- Richard Shaw Terrill
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory cells configurable as CAM or RAM in programmable logic devices
- Patent number 5,940,852
- Issue date Aug 17, 1999
- Altera Corporation
- Krishna Rangasayee
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic array integrated circuit devices
- Patent number 5,850,152
- Issue date Dec 15, 1998
- Altera Corporation
- Richard G. Cliff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic array intergrated circuit devices
- Patent number 5,850,151
- Issue date Dec 15, 1998
- Altera Corporation
- Richard G. Cliff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for programming programmable logic array devices
- Patent number 5,680,061
- Issue date Oct 21, 1997
- Altera Corporation
- Kerry Veenstra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programming circuits and techniques for programming logic
- Patent number 5,590,305
- Issue date Dec 31, 1996
- Altera Corporation
- Richard S. Terrill
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for programming programmable logic array devices
- Patent number 5,543,730
- Issue date Aug 6, 1996
- Altera Corporation
- Richard G. Cliff
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROGRAMMING CIRCUITS AND TECHNIQUES FOR PROGRAMMABLE LOGIC
- Publication number 20030160633
- Publication date Aug 28, 2003
- Richard Shaw Terrill
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable logic array integrated circuit devices
- Publication number 20030128051
- Publication date Jul 10, 2003
- Richard G. Cliff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable voltage regulator
- Publication number 20010017595
- Publication date Aug 30, 2001
- Richard Cliff
- G05 - CONTROLLING REGULATING
Information Patent Application
Techniques for programming programmable logic array devices
- Publication number 20010003844
- Publication date Jun 14, 2001
- Altera Corporation
- Richard G. Cliff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Phase-locked loop or delay-locked loop circuitry for programmable l...
- Publication number 20010000426
- Publication date Apr 26, 2001
- Altera Corporation
- Chiakang Sung
- G06 - COMPUTING CALCULATING COUNTING

Robert Richard Noel Bielby

Person

Patents Grantslast 30 patents

Apparatus and method for routing of signals

Apparatus and method for routing of signals

Apparatus and method for low power routing of signals in a low volt...

Apparatus and method for low power routing of signals in a Low Volt...

Programmable logic array integrated circuit devices

Programming circuits and techniques for programmable logic

Phase-locked loop circuitry for programmable logic devices

Phase-locked loop or delay-locked loop circuitry for programmable l...

Programmable logic array integrated circuit devices

Techniques for programming programmable logic array devices

Programmable voltage regulator

Phase-locked loop or delay-locked loop circuitry for programmable l...

Memory cells configurable as CAM or RAM in programmable logic devices

Reducing I/O noise when leaving programming mode

Method and apparatus for programmably providing a power supply volt...

Phase-locked loop circuitry for programmable logic devices

Techniques for programming programmable logic array devices

Phase-locked loop or delay-locked loop circuitry for programmable l...

Programmable logic device with selectable schmitt-triggered and thr...

Programmable logic device architecture incorporating a dedicated cr...

Memory cells configurable as CAM or RAM in programmable logic devices

Programming circuits and techniques for programmable logic

Memory cells configurable as CAM or RAM in programmable logic devices

Programmable logic array integrated circuit devices

Programmable logic array intergrated circuit devices

Techniques for programming programmable logic array devices

Programming circuits and techniques for programming logic

Techniques for programming programmable logic array devices

Patents Applicationslast 30 patents

PROGRAMMING CIRCUITS AND TECHNIQUES FOR PROGRAMMABLE LOGIC

Programmable logic array integrated circuit devices

Programmable voltage regulator

Techniques for programming programmable logic array devices

Phase-locked loop or delay-locked loop circuitry for programmable l...