Rode R. Mora

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Shallow trench isolation for SOI structures combining sidewall spac...
- Patent number 8,766,362
- Issue date Jul 1, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Konstantin V. Loiko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making an inverted-T channel transistor
- Patent number 8,513,066
- Issue date Aug 20, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Leo Mathew
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation for SOI structures combining sidewall spac...
- Patent number 8,236,638
- Issue date Aug 7, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Konstantin V. Loiko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor fabrication process including silicide stringer remov...
- Patent number 7,998,822
- Issue date Aug 16, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Dharmesh Jawarani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Split gate non-volatile memory cell
- Patent number 7,939,880
- Issue date May 10, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Sung-Taeg Kang
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Semiconductor structure pattern formation
- Patent number 7,829,447
- Issue date Nov 9, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Leo Mathew
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a semiconductor isolation trench
- Patent number 7,687,370
- Issue date Mar 30, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Toni D. Van Gompel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Split gate memory cell method
- Patent number 7,579,243
- Issue date Aug 25, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Sung-Taeg Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of forming electronic device including a densified nitride...
- Patent number 7,528,078
- Issue date May 5, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Toni D. Van Gompel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor fabrication process including silicide stringer remov...
- Patent number 7,446,006
- Issue date Nov 4, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Dharmesh Jawarani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of semiconductor fabrication incorporating disposable spacer...
- Patent number 7,125,805
- Issue date Oct 24, 2006
- FREESCALE SEMICONDUCTOR, INC.
- Jian Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Confined spacers for double gate transistor semiconductor fabricati...
- Patent number 6,951,783
- Issue date Oct 4, 2005
- FREESCALE SEMICONDUCTOR, INC.
- Leo Mathew
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SHALLOW TRENCH ISOLATION FOR SOI STRUCTURES COMBINING SIDEWALL SPAC...
- Publication number 20140299935
- Publication date Oct 9, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Konstantin V. Loiko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SHALLOW TRENCH ISOLATION FOR SOI STRUCTURES COMBINING SIDEWALL SPAC...
- Publication number 20120273889
- Publication date Nov 1, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Konstantin V. Loiko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPLIT GATE NON-VOLATILE MEMORY CELL
- Publication number 20090256186
- Publication date Oct 15, 2009
- SUNG-TAEG KANG
- B82 - NANO-TECHNOLOGY
Information Patent Application
SEMICONDUCTOR FABRICATION PROCESS INCLUDING SILICIDE STRINGER REMOV...
- Publication number 20090093108
- Publication date Apr 9, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Dharmesh Jawarani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shallow trench isolation for SOI structures combining sidewall spac...
- Publication number 20080261361
- Publication date Oct 23, 2008
- Freescale Semiconductor, Inc.
- Konstantin V. Loiko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPLIT GATE MEMORY CELL METHOD
- Publication number 20080076221
- Publication date Mar 27, 2008
- Sung-Taeg Kang
- B82 - NANO-TECHNOLOGY
Information Patent Application
SEMICONDUCTOR STRUCTURE PATTERN FORMATION
- Publication number 20070269969
- Publication date Nov 22, 2007
- Leo Mathew
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process of forming electronic device including a densified nitride...
- Publication number 20070264839
- Publication date Nov 15, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Toni D. Van Gompel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electronic device including a semiconductor layer and a sidewall sp...
- Publication number 20070249127
- Publication date Oct 25, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Rode R. Mora
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming a stressor structure
- Publication number 20070224772
- Publication date Sep 27, 2007
- Freescale Semiconductor, Inc.
- Mark D. Hall
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for improving self-aligned silicide extendibility with space...
- Publication number 20070197011
- Publication date Aug 23, 2007
- Freescale Semiconductor Inc.
- Anadi Srivastava
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming a semiconductor isolation trench
- Publication number 20070178661
- Publication date Aug 2, 2007
- Toni D. Van Gompel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of making an inverted-T channel transistor
- Publication number 20070093010
- Publication date Apr 26, 2007
- Leo Mathew
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor fabrication process including silicide stringer remov...
- Publication number 20070059911
- Publication date Mar 15, 2007
- Freescale Semiconductor, Inc.
- Dharmesh Jawarani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of semiconductor fabrication incorporating disposable spacer...
- Publication number 20050250287
- Publication date Nov 10, 2005
- Jian Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFINED SPACERS FOR DOUBLE GATE TRANSISTOR SEMICONDUCTOR FABRICATI...
- Publication number 20050101069
- Publication date May 12, 2005
- Leo Mathew
- H01 - BASIC ELECTRIC ELEMENTS

Rode R. Mora

Person

Patents Grantslast 30 patents

Shallow trench isolation for SOI structures combining sidewall spac...

Method of making an inverted-T channel transistor

Shallow trench isolation for SOI structures combining sidewall spac...

Semiconductor fabrication process including silicide stringer remov...

Split gate non-volatile memory cell

Semiconductor structure pattern formation

Method of forming a semiconductor isolation trench

Split gate memory cell method

Process of forming electronic device including a densified nitride...

Semiconductor fabrication process including silicide stringer remov...

Method of semiconductor fabrication incorporating disposable spacer...

Confined spacers for double gate transistor semiconductor fabricati...

Patents Applicationslast 30 patents

SHALLOW TRENCH ISOLATION FOR SOI STRUCTURES COMBINING SIDEWALL SPAC...

SHALLOW TRENCH ISOLATION FOR SOI STRUCTURES COMBINING SIDEWALL SPAC...

SPLIT GATE NON-VOLATILE MEMORY CELL

SEMICONDUCTOR FABRICATION PROCESS INCLUDING SILICIDE STRINGER REMOV...

Shallow trench isolation for SOI structures combining sidewall spac...

SPLIT GATE MEMORY CELL METHOD

SEMICONDUCTOR STRUCTURE PATTERN FORMATION

Process of forming electronic device including a densified nitride...

Electronic device including a semiconductor layer and a sidewall sp...

Method for forming a stressor structure

Method for improving self-aligned silicide extendibility with space...

Method of forming a semiconductor isolation trench

Method of making an inverted-T channel transistor

Semiconductor fabrication process including silicide stringer remov...

Method of semiconductor fabrication incorporating disposable spacer...

CONFINED SPACERS FOR DOUBLE GATE TRANSISTOR SEMICONDUCTOR FABRICATI...