Rohit Kumar

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Transmitter voltage and receiver time margining
- Patent number 8,570,881
- Issue date Oct 29, 2013
- Advanced Micro Devices, Inc.
- Gerald R. Talbot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method to decrease locktime in a phase locked loop
- Patent number 8,503,597
- Issue date Aug 6, 2013
- Advanced Micro Devices, Inc.
- Dennis M. Fischette
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
In-band method to configure equalization levels
- Patent number 7,986,727
- Issue date Jul 26, 2011
- GLOBALFOUNDRIES Inc.
- Gerald R. Talbot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Hybrid output driver for high-speed communications interfaces
- Patent number 7,817,727
- Issue date Oct 19, 2010
- GLOBALFOUNDRIES, INC.
- Rohit Kumar
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and apparatus for sharing an input/output terminal by multip...
- Patent number 7,271,613
- Issue date Sep 18, 2007
- Advanced Micro Devices, Inc.
- Ross Voigt La Fetra
- G01 - MEASURING TESTING
Information Patent Grant
Voltage controlled delay line (VCDL) having embedded multiplexer an...
- Patent number 7,256,636
- Issue date Aug 14, 2007
- Advanced Micro Devices, Inc.
- Rohit Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transmit based equalization using a voltage mode driver
- Patent number 7,227,382
- Issue date Jun 5, 2007
- Advanced Micro Devices, Inc.
- Gerald R. Talbot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
PRESENCE DETECTION WITH DYNAMIC RADAR OPERATING MODES
- Publication number 20240201779
- Publication date Jun 20, 2024
- Zheda Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD TO DECREASE LOCKTIME IN A PHASE LOCKED LOOP
- Publication number 20120170699
- Publication date Jul 5, 2012
- Dennis M. Fischette
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HYBRID OUTPUT DRIVER FOR HIGH-SPEED COMMUNICATIONS INTERFACES
- Publication number 20080034378
- Publication date Feb 7, 2008
- Rohit Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSMITTER VOLTAGE AND RECEIVER TIME MARGINING
- Publication number 20070230513
- Publication date Oct 4, 2007
- Gerald R. Talbot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Voltage controlled delay line (VCDL) having embedded multiplexer an...
- Publication number 20070075757
- Publication date Apr 5, 2007
- Advanced Micro Devices, Inc.
- Rohit Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY

Rohit Kumar

Person

Patents Grantslast 30 patents

Transmitter voltage and receiver time margining

Method to decrease locktime in a phase locked loop

In-band method to configure equalization levels

Hybrid output driver for high-speed communications interfaces

Method and apparatus for sharing an input/output terminal by multip...

Voltage controlled delay line (VCDL) having embedded multiplexer an...

Transmit based equalization using a voltage mode driver

Patents Applicationslast 30 patents

PRESENCE DETECTION WITH DYNAMIC RADAR OPERATING MODES

METHOD TO DECREASE LOCKTIME IN A PHASE LOCKED LOOP

HYBRID OUTPUT DRIVER FOR HIGH-SPEED COMMUNICATIONS INTERFACES

TRANSMITTER VOLTAGE AND RECEIVER TIME MARGINING

Voltage controlled delay line (VCDL) having embedded multiplexer an...