Roman Perez

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Package design and method of manufacture for chip grid array
- Patent number 7,456,496
- Issue date Nov 25, 2008
- Advanpack Solutions PTE LTD
- Tan Kim Hwee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package design and method of manufacture for chip grid array
- Patent number 6,929,981
- Issue date Aug 16, 2005
- Advanpack Solutions PTE, Ltd.
- Tan Kim Hwee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of assembling a package with an exposed die backside with an...
- Patent number 6,750,082
- Issue date Jun 15, 2004
- Advanpack Solutions PTE LTD
- John Briar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip grid array package design and method of manufacture
- Patent number 6,734,039
- Issue date May 11, 2004
- Advanpack Solutions PTE LTD
- Tan Kim Hwee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
Package design and method of manufacture for chip grid array
- Publication number 20050205987
- Publication date Sep 22, 2005
- Advanpack Solutions Pte. Ltd.
- Tan Kim Hwee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flip chip package using no-flow underfill and method of fabrication
- Publication number 20050087883
- Publication date Apr 28, 2005
- Advanpack Solutions Pte. Ltd.
- Tan Kim Hwee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Leadless semiconductor packaging structure with inverted flip chip...
- Publication number 20040108580
- Publication date Jun 10, 2004
- Advanpack Solutions Pte. Ltd.
- Kim Hwee Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for constraining the spread of solder during reflow for prep...
- Publication number 20040084508
- Publication date May 6, 2004
- Advanpack Solutions Pte. Ltd.
- John Briar
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method of assembling a package with an exposed die backside with an...
- Publication number 20040053445
- Publication date Mar 18, 2004
- Advanpack Solutions Pte. Ltd.
- John Briar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor chip grid array package design and method of manufacture
- Publication number 20040046238
- Publication date Mar 11, 2004
- Advanpack Solutions Pte. Ltd.
- Tan Kim Hwee
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Package design and method of manufacture for chip grid array
- Publication number 20040046257
- Publication date Mar 11, 2004
- Advanpack Solutions Pte. Ltd.
- Tan Kim Hwee
- H01 - BASIC ELECTRIC ELEMENTS

Roman Perez

Person

Patents Grantslast 30 patents

Package design and method of manufacture for chip grid array

Package design and method of manufacture for chip grid array

Method of assembling a package with an exposed die backside with an...

Semiconductor chip grid array package design and method of manufacture

Patents Applicationslast 30 patents

Package design and method of manufacture for chip grid array

Flip chip package using no-flow underfill and method of fabrication

Leadless semiconductor packaging structure with inverted flip chip...

Method for constraining the spread of solder during reflow for prep...

Method of assembling a package with an exposed die backside with an...

Semiconductor chip grid array package design and method of manufacture

Package design and method of manufacture for chip grid array