Saket Jalan

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Error correction hardware with fault detection
- Patent number 11,740,968
- Issue date Aug 29, 2023
- Texas Instruments Incorporated
- Saket Jalan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for reduced area control register circuit
- Patent number 11,631,454
- Issue date Apr 18, 2023
- Texas Instruments Incorporated
- Saket Jalan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction hardware with fault detection
- Patent number 11,372,715
- Issue date Jun 28, 2022
- Texas Instruments Incorporated
- Saket Jalan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self test for safety logic
- Patent number 11,320,488
- Issue date May 3, 2022
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- G01 - MEASURING TESTING
Information Patent Grant
Self test for safety logic
- Patent number 10,935,602
- Issue date Mar 2, 2021
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- G01 - MEASURING TESTING
Information Patent Grant
Error-correcting code memory
- Patent number 10,838,808
- Issue date Nov 17, 2020
- Texas Instruments Incorporated
- Indu Prathapan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction hardware with fault detection
- Patent number 10,599,514
- Issue date Mar 24, 2020
- Texas Instruments Incorporated
- Saket Jalan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for reduced area control register circuit
- Patent number 10,559,351
- Issue date Feb 11, 2020
- Texas Instruments Incorporated
- Saket Jalan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error-correcting code memory
- Patent number 10,372,531
- Issue date Aug 6, 2019
- Texas Instruments Incorporated
- Indu Prathapan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self test for safety logic
- Patent number 9,964,597
- Issue date May 8, 2018
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- G01 - MEASURING TESTING
Information Patent Grant
Error correction hardware with fault detection
- Patent number 9,904,595
- Issue date Feb 27, 2018
- Texas Instruments Incorporated
- Saket Jalan
- G11 - INFORMATION STORAGE
Information Patent Grant
Reset selection cell to mitigate initialization time
- Patent number 9,602,107
- Issue date Mar 21, 2017
- Texas Instruments Incorporated
- Saket Jalan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for fast modification of register content
- Patent number 9,361,027
- Issue date Jun 7, 2016
- Texas Instruments Incorporated
- Saket Jalan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fully automated. high throughput, configurable digital design inter...
- Patent number 9,287,876
- Issue date Mar 15, 2016
- Texas Instruments Incorporated
- Saket Jalan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Near-integer channel spur mitigation in a phase-locked loop
- Patent number 8,971,455
- Issue date Mar 3, 2015
- Texas Instruments Incorporated
- Raghu Ganesan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Precise delay alignment between amplitude and phase/frequency modul...
- Patent number 7,817,747
- Issue date Oct 19, 2010
- Texas Instruments Incorporated
- Khurram Waheed
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
MASH sigma delta modulator
- Patent number 7,548,179
- Issue date Jun 16, 2009
- Texas Instruments Incorporated
- Saket Jalan
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Error Correction Hardware With Fault Detection
- Publication number 20220283899
- Publication date Sep 8, 2022
- TEXAS INSTRUMENTS INCORPORATED
- SAKET JALAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Self Test for Safety Logic
- Publication number 20210148976
- Publication date May 20, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan Rangachari
- G01 - MEASURING TESTING
Information Patent Application
FALSE PATH TIMING EXCEPTION HANDLER CIRCUIT
- Publication number 20200372197
- Publication date Nov 26, 2020
- TEXAS INSTRUMENTS INCORPORATED
- WILSON PRADEEP
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error Correction Hardware With Fault Detection
- Publication number 20200210287
- Publication date Jul 2, 2020
- TEXAS INSTRUMENTS INCORPORATED
- SAKET JALAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR REDUCED AREA CONTROL REGISTER CIRCUIT
- Publication number 20200152261
- Publication date May 14, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Saket Jalan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR-CORRECTING CODE MEMORY
- Publication number 20190317855
- Publication date Oct 17, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Indu PRATHAPAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FALSE PATH TIMING EXCEPTION HANDLER CIRCUIT
- Publication number 20190266303
- Publication date Aug 29, 2019
- TEXAS INSTRUMENTS INCORPORATED
- WILSON PRADEEP
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FALSE PATH TIMING EXCEPTION HANDLER CIRCUIT
- Publication number 20180307788
- Publication date Oct 25, 2018
- TEXAS INSTRUMENTS INCORPORATED
- WILSON PRADEEP
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Self Test for Safety Logic
- Publication number 20180252771
- Publication date Sep 6, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan Rangachari
- G01 - MEASURING TESTING
Information Patent Application
METHODS AND APPARATUS FOR REDUCED AREA CONTROL REGISTER CIRCUIT
- Publication number 20180239530
- Publication date Aug 23, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Saket Jalan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR-CORRECTING CODE MEMORY
- Publication number 20180189133
- Publication date Jul 5, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Indu PRATHAPAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error Correction Hardware With Fault Detection
- Publication number 20180107541
- Publication date Apr 19, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Saket Jalan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Self Test for Safety Logic
- Publication number 20180059180
- Publication date Mar 1, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan Rangachari
- G01 - MEASURING TESTING
Information Patent Application
ERROR CORRECTION HARDWARE WITH FAULT DETECTION
- Publication number 20180060163
- Publication date Mar 1, 2018
- TEXAS INSTRUMENTS INCORPORATED
- SAKET JALAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESET SELECTION CELL TO MITIGATE INITIALIZATION TIME
- Publication number 20160182020
- Publication date Jun 23, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Saket Jalan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM AND METHOD FOR FAST MODIFICATION OF REGISTER CONTENT
- Publication number 20160170640
- Publication date Jun 16, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Saket Jalan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEAR-INTEGER CHANNEL SPUR MITIGATION IN A PHASE-LOCKED LOOP
- Publication number 20130147529
- Publication date Jun 13, 2013
- Raghu Ganesan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL CALIBRATION DEVICE AND METHOD FOR HIGH SPEED DIGITAL SYSTEMS
- Publication number 20110248757
- Publication date Oct 13, 2011
- SAKET JALAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MASH SIGMA DELTA MODULATOR
- Publication number 20090109076
- Publication date Apr 30, 2009
- SAKET JALAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PRECISE DELAY ALIGNMENT BETWEEN AMPLITUDE AND PHASE/FREQUENCY MODUL...
- Publication number 20070189417
- Publication date Aug 16, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Khurram Waheed
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Saket Jalan

Person

Patents Grantslast 30 patents

Error correction hardware with fault detection

Methods and apparatus for reduced area control register circuit

Error correction hardware with fault detection

Self test for safety logic

Self test for safety logic

Error-correcting code memory

Error correction hardware with fault detection

Methods and apparatus for reduced area control register circuit

Error-correcting code memory

Self test for safety logic

Error correction hardware with fault detection

Reset selection cell to mitigate initialization time

System and method for fast modification of register content

Fully automated. high throughput, configurable digital design inter...

Near-integer channel spur mitigation in a phase-locked loop

Precise delay alignment between amplitude and phase/frequency modul...

MASH sigma delta modulator

Patents Applicationslast 30 patents

Error Correction Hardware With Fault Detection

Self Test for Safety Logic

FALSE PATH TIMING EXCEPTION HANDLER CIRCUIT

Error Correction Hardware With Fault Detection

METHODS AND APPARATUS FOR REDUCED AREA CONTROL REGISTER CIRCUIT

ERROR-CORRECTING CODE MEMORY

FALSE PATH TIMING EXCEPTION HANDLER CIRCUIT

FALSE PATH TIMING EXCEPTION HANDLER CIRCUIT

Self Test for Safety Logic

METHODS AND APPARATUS FOR REDUCED AREA CONTROL REGISTER CIRCUIT

ERROR-CORRECTING CODE MEMORY

Error Correction Hardware With Fault Detection

Self Test for Safety Logic

ERROR CORRECTION HARDWARE WITH FAULT DETECTION

RESET SELECTION CELL TO MITIGATE INITIALIZATION TIME

SYSTEM AND METHOD FOR FAST MODIFICATION OF REGISTER CONTENT

NEAR-INTEGER CHANNEL SPUR MITIGATION IN A PHASE-LOCKED LOOP

DIGITAL CALIBRATION DEVICE AND METHOD FOR HIGH SPEED DIGITAL SYSTEMS

MASH SIGMA DELTA MODULATOR

PRECISE DELAY ALIGNMENT BETWEEN AMPLITUDE AND PHASE/FREQUENCY MODUL...