SARABJEET SINGH

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BANGALORE, IN

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Patents Grantslast 30 patents

Information Patent Grant
Generating negative impedance compensation
- Patent number 8,872,587
- Issue date Oct 28, 2014
- International Business Machines Corporation
- Rajesh Cheeranthodi
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Generating Negative Impedance Compensation
- Publication number 20140253236
- Publication date Sep 11, 2014
- International Business Machines Corporation
- RAJESH CHEERANTHODI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Low Power and Full Swing Pseudo CML Latched Logic-Gates
- Publication number 20090302916
- Publication date Dec 10, 2009
- Sarabjeet Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Low Power and Full Rail-to-Rail Swing Pseudo CML Latch
- Publication number 20090302915
- Publication date Dec 10, 2009
- Sarabjeet Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
High Speed "Pseudo" Current Mode Logic (CML) Integrated Circuit Mem...
- Publication number 20090302893
- Publication date Dec 10, 2009
- Sarabjeet Singh
- H03 - BASIC ELECTRONIC CIRCUITRY