Sean W King

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Conformal low temperature hermetic dielectric diffusion barriers
- Patent number 12,040,226
- Issue date Jul 16, 2024
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conformal low temperature hermetic dielectric diffusion barriers
- Patent number 11,670,545
- Issue date Jun 6, 2023
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conformal low temperature hermetic dielectric diffusion barriers
- Patent number 11,587,827
- Issue date Feb 21, 2023
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conformal low temperature hermetic dielectric diffusion barriers
- Patent number 11,251,076
- Issue date Feb 15, 2022
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conformal low temperature hermetic dielectric diffusion barriers
- Patent number 10,763,161
- Issue date Sep 1, 2020
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conformal low temperature hermetic dielectric diffusion barriers
- Patent number 10,529,619
- Issue date Jan 7, 2020
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conformal low temperature hermetic dielectric diffusion barriers
- Patent number 10,438,844
- Issue date Oct 8, 2019
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Amorphous hydrogenated boron carbide low-k dielectric and method of...
- Patent number 10,301,719
- Issue date May 28, 2019
- The Curators of the University of Missouri
- Michelle Paquette
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Conformal low temperature hermetic dielectric diffusion barriers
- Patent number 9,935,002
- Issue date Apr 3, 2018
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conformal low temperature hermetic dielectric diffusion barriers
- Patent number 9,754,821
- Issue date Sep 5, 2017
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conformal low temperature hermetic dielectric diffusion barriers
- Patent number 9,330,963
- Issue date May 3, 2016
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic transistor having an epitaxial graphene channel layer
- Patent number 8,785,261
- Issue date Jul 22, 2014
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dielectric separator layer
- Patent number 8,674,484
- Issue date Mar 18, 2014
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming planarized hermetic barrier layers and structur...
- Patent number 8,524,597
- Issue date Sep 3, 2013
- Intel Corporation
- Sean W. King
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Self-forming, self-aligned barriers for back-end interconnects and...
- Patent number 8,461,683
- Issue date Jun 11, 2013
- Intel Corporation
- Hui Jae Yoo
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Transistor having an etch stop layer including a metal compound tha...
- Patent number 8,399,317
- Issue date Mar 19, 2013
- Intel Corporation
- Andrew Ott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Adhesion and electromigration performance at an interface between a...
- Patent number 8,178,436
- Issue date May 15, 2012
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of interconnects in a low-k interlayer dielectrics
- Patent number 8,143,159
- Issue date Mar 27, 2012
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor having an etch stop layer including a metal compound tha...
- Patent number 8,120,114
- Issue date Feb 21, 2012
- Intel Corporation
- Andrew Ott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming self-aligned low resistance contact layer
- Patent number 8,088,665
- Issue date Jan 3, 2012
- Intel Corporation
- Willy Rachmady
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming planarized hermetic barrier layers and structur...
- Patent number 8,039,920
- Issue date Oct 18, 2011
- Intel Corporation
- Sean W. King
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Selective deposition of amorphous silicon films on metal gates
- Patent number 7,816,218
- Issue date Oct 19, 2010
- Intel Corporation
- Jason Klaus
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect in low-k interlayer dielectrics
- Patent number 7,812,455
- Issue date Oct 12, 2010
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective deposition of a dielectric on a self-assembled monolayer-...
- Patent number 7,790,631
- Issue date Sep 7, 2010
- Intel Corporation
- Ajay K. Sharma
- B05 - SPRAYING OR ATOMISING IN GENERAL APPLYING LIQUIDS OR OTHER FLUENT MATER...
Information Patent Grant
Selective formation of dielectric etch stop layers
- Patent number 7,759,262
- Issue date Jul 20, 2010
- Intel Corporation
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer film stack for extinction of substrate reflections duri...
- Patent number 7,291,552
- Issue date Nov 6, 2007
- Intel Corporation
- Sanjay S. Natarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated low-k hard mask
- Patent number 7,199,473
- Issue date Apr 3, 2007
- Intel Corporation
- Sean W. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer film stack for extinction of substrate reflections duri...
- Patent number 7,172,960
- Issue date Feb 6, 2007
- Intel Corporation
- Sanjay S. Natarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated low-k hard mask
- Patent number 6,974,772
- Issue date Dec 13, 2005
- Intel Corporation
- Sean W. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reclaiming virgin test wafers
- Patent number 6,761,625
- Issue date Jul 13, 2004
- Intel Corporation
- Hossein Rojhantalab
- B24 - GRINDING POLISHING

Patents Applicationslast 30 patents

Information Patent Application
CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS
- Publication number 20240282624
- Publication date Aug 22, 2024
- Intel Corporation
- Sean KING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND...
- Publication number 20240203786
- Publication date Jun 20, 2024
- Tahoe Research, Ltd.
- Hui Jae YOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS
- Publication number 20230260833
- Publication date Aug 17, 2023
- Intel Corporation
- Sean KING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT INTERCONNECT STRUCTURES WITH GRAPHENE CAP
- Publication number 20220415818
- Publication date Dec 29, 2022
- Intel Corporation
- Carl Naylor
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS
- Publication number 20220344201
- Publication date Oct 27, 2022
- Intel Corporation
- Sean KING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS
- Publication number 20220122881
- Publication date Apr 21, 2022
- Intel Corporation
- Sean KING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS
- Publication number 20200357687
- Publication date Nov 12, 2020
- Intel Corporation
- Sean KING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS
- Publication number 20200105588
- Publication date Apr 2, 2020
- Intel Corporation
- Sean KING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS
- Publication number 20190371658
- Publication date Dec 5, 2019
- Intel Corporation
- Sean KING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS
- Publication number 20180218940
- Publication date Aug 2, 2018
- Intel Corporation
- Sean KING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS
- Publication number 20170372947
- Publication date Dec 28, 2017
- Intel Corporation
- Sean KING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND...
- Publication number 20160307796
- Publication date Oct 20, 2016
- Intel Corporation
- Hui Jae Yoo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS
- Publication number 20160247715
- Publication date Aug 25, 2016
- Intel Corporation
- Sean KING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS
- Publication number 20130292835
- Publication date Nov 7, 2013
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND...
- Publication number 20130260553
- Publication date Oct 3, 2013
- Hui Jae Yoo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND...
- Publication number 20120248608
- Publication date Oct 4, 2012
- Hui Jae Yoo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FORMING PLANARIZED HERMETIC BARRIER LAYERS AND STRUCTUR...
- Publication number 20120122312
- Publication date May 17, 2012
- Sean W. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC TRANSISTOR HAVING AN EPITAXIAL GRAPHENE CHANNEL LAYER
- Publication number 20120074387
- Publication date Mar 29, 2012
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR HAVING AN ETCH STOP LAYER INCLUDING A METAL COMPOUND THA...
- Publication number 20120034773
- Publication date Feb 9, 2012
- Andrew Ott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fabrication of interconnects in a low-k interlayer dielectrics
- Publication number 20110003471
- Publication date Jan 6, 2011
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dielectric separator layer
- Publication number 20100164074
- Publication date Jul 1, 2010
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Selective deposition of amorphous silicon films on metal gates
- Publication number 20100038687
- Publication date Feb 18, 2010
- Jason Klaus
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming self-aligned low resistance contact layer
- Publication number 20100035399
- Publication date Feb 11, 2010
- Willy Rachmady
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVE FORMATION OF DIELECTRIC ETCH STOP LAYERS
- Publication number 20090321795
- Publication date Dec 31, 2009
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF INTERCONNECTS IN LOW-K INTERLAYER DIELECTRICS
- Publication number 20090309227
- Publication date Dec 17, 2009
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transistor having an etch stop layer including a metal compound tha...
- Publication number 20080157365
- Publication date Jul 3, 2008
- Andrew Ott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Adhesion and electromigration performance at an interface between a...
- Publication number 20080150145
- Publication date Jun 26, 2008
- Sean King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Selective deposition of a dielectric on a self-assembled monolayer-...
- Publication number 20080116481
- Publication date May 22, 2008
- Ajay K. Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Capping layer to reduce amine poisoning of photoresist layers
- Publication number 20070059913
- Publication date Mar 15, 2007
- Sean W. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-layer film stack for extinction of substrate reflections duri...
- Publication number 20060094251
- Publication date May 4, 2006
- Sanjay S. Natarajan
- H01 - BASIC ELECTRIC ELEMENTS

Sean W King

Person

Patents Grantslast 30 patents

Conformal low temperature hermetic dielectric diffusion barriers

Conformal low temperature hermetic dielectric diffusion barriers

Conformal low temperature hermetic dielectric diffusion barriers

Conformal low temperature hermetic dielectric diffusion barriers

Conformal low temperature hermetic dielectric diffusion barriers

Conformal low temperature hermetic dielectric diffusion barriers

Conformal low temperature hermetic dielectric diffusion barriers

Amorphous hydrogenated boron carbide low-k dielectric and method of...

Conformal low temperature hermetic dielectric diffusion barriers

Conformal low temperature hermetic dielectric diffusion barriers

Conformal low temperature hermetic dielectric diffusion barriers

Microelectronic transistor having an epitaxial graphene channel layer

Dielectric separator layer

Methods for forming planarized hermetic barrier layers and structur...

Self-forming, self-aligned barriers for back-end interconnects and...

Transistor having an etch stop layer including a metal compound tha...

Adhesion and electromigration performance at an interface between a...

Fabrication of interconnects in a low-k interlayer dielectrics

Transistor having an etch stop layer including a metal compound tha...

Method of forming self-aligned low resistance contact layer

Methods for forming planarized hermetic barrier layers and structur...

Selective deposition of amorphous silicon films on metal gates

Interconnect in low-k interlayer dielectrics

Selective deposition of a dielectric on a self-assembled monolayer-...

Selective formation of dielectric etch stop layers

Multi-layer film stack for extinction of substrate reflections duri...

Integrated low-k hard mask

Multi-layer film stack for extinction of substrate reflections duri...

Integrated low-k hard mask

Reclaiming virgin test wafers

Patents Applicationslast 30 patents

CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS

SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND...

CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS

INTEGRATED CIRCUIT INTERCONNECT STRUCTURES WITH GRAPHENE CAP

CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS

CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS

CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS

CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS

CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS

CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS

CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS

SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND...

CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS

CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS

SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND...

SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND...

METHODS FOR FORMING PLANARIZED HERMETIC BARRIER LAYERS AND STRUCTUR...

MICROELECTRONIC TRANSISTOR HAVING AN EPITAXIAL GRAPHENE CHANNEL LAYER

TRANSISTOR HAVING AN ETCH STOP LAYER INCLUDING A METAL COMPOUND THA...

Fabrication of interconnects in a low-k interlayer dielectrics

Dielectric separator layer

Selective deposition of amorphous silicon films on metal gates

Method of forming self-aligned low resistance contact layer

SELECTIVE FORMATION OF DIELECTRIC ETCH STOP LAYERS

FABRICATION OF INTERCONNECTS IN LOW-K INTERLAYER DIELECTRICS

Transistor having an etch stop layer including a metal compound tha...

Adhesion and electromigration performance at an interface between a...

Selective deposition of a dielectric on a self-assembled monolayer-...

Capping layer to reduce amine poisoning of photoresist layers

Multi-layer film stack for extinction of substrate reflections duri...