Seok Ling Lim

Person

Kulim, MY

People

Patents Grantslast 30 patents

Information Patent Grant
Interposer structures and methods for 2.5D and 3D packaging
- Patent number 11,955,431
- Issue date Apr 9, 2024
- Intel Corporation
- Jenny Shio Yin Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packages with conductive element having cavities...
- Patent number 11,887,940
- Issue date Jan 30, 2024
- Intel Corporation
- Seok Ling Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded reference layers for semiconductor package substrates
- Patent number 11,676,910
- Issue date Jun 13, 2023
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor miniaturization through component placement on steppe...
- Patent number 11,574,877
- Issue date Feb 7, 2023
- Intel Corporation
- Jenny Shio Yin Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Frame-array interconnects for integrated-circuit packages
- Patent number 11,562,954
- Issue date Jan 24, 2023
- Intel Corporation
- Seok Ling Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip package with extended frame
- Patent number 11,527,467
- Issue date Dec 13, 2022
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical shield for stacked heterogeneous device integration
- Patent number 11,527,485
- Issue date Dec 13, 2022
- Intel Corporation
- Seok Ling Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid ball grid array package for high speed interconnects
- Patent number 11,527,463
- Issue date Dec 13, 2022
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Composite bridge die-to-die interconnects for integrated-circuit pa...
- Patent number 11,521,932
- Issue date Dec 6, 2022
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Molded power delivery interconnect module for improved Imax and pow...
- Patent number 11,508,660
- Issue date Nov 22, 2022
- Intel Corporation
- Seok Ling Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interposer for hybrid interconnect geometry
- Patent number 11,508,650
- Issue date Nov 22, 2022
- Intel Corporation
- Jenny Shio Yin Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-level components for integrated-circuit packages
- Patent number 11,476,198
- Issue date Oct 18, 2022
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate cores for warpage control
- Patent number 11,462,488
- Issue date Oct 4, 2022
- Intel Corporation
- Seok Ling Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Overhang bridge interconnect
- Patent number 11,430,764
- Issue date Aug 30, 2022
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with hybrid through-silicon-vias
- Patent number 11,367,673
- Issue date Jun 21, 2022
- Intel Corporation
- Seok Ling Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical power plane module for semiconductor packages
- Patent number 11,342,289
- Issue date May 24, 2022
- Intel Corporation
- Jenny Shio Yin Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-faceted integrated-circuit dice and packages
- Patent number 11,289,427
- Issue date Mar 29, 2022
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated bridge for die-to-die interconnects
- Patent number 11,282,780
- Issue date Mar 22, 2022
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with co-axial ball-grid-array
- Patent number 11,284,518
- Issue date Mar 22, 2022
- Intel Corporation
- Jackson Chung Peng Kong
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Stiffener build-up layer package
- Patent number 11,227,841
- Issue date Jan 18, 2022
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stiffener shield for device integration
- Patent number 11,205,622
- Issue date Dec 21, 2021
- Intel Corporation
- Jenny Shio Yin Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded reference layers for semiconductor package substrates
- Patent number 11,195,801
- Issue date Dec 7, 2021
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package with wall-side capacitors
- Patent number 11,158,568
- Issue date Oct 26, 2021
- Intel Corporation
- Jenny Shio Yin Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plane-less voltage reference interconnects
- Patent number 11,037,874
- Issue date Jun 15, 2021
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional decoupling integration within hole in motherboard
- Patent number 11,006,514
- Issue date May 11, 2021
- Intel Corporation
- Jia Yan Go
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitors embedded in stiffeners for small form-factor and methods...
- Patent number 10,985,147
- Issue date Apr 20, 2021
- Intel Corporation
- Jenny Shio Yin Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stiffener-integrated interconnect bypasses for chip-package apparat...
- Patent number 10,978,407
- Issue date Apr 13, 2021
- Intel Corporation
- Jackson Chung Peng Kong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic packages with stacked sitffeners and methods of assembli...
- Patent number 10,964,677
- Issue date Mar 30, 2021
- Intel Corporation
- Jenny Shio Yin Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packages with conductive element having cavities...
- Patent number 10,910,325
- Issue date Feb 2, 2021
- Intel Corporation
- Seok Ling Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical modular stiffeners for stacked multi-device packages
- Patent number 10,903,155
- Issue date Jan 26, 2021
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ELECTRONIC INTERCONNECT AND METHOD OF FORMING THE SAME
- Publication number 20240145365
- Publication date May 2, 2024
- Intel Corporation
- Bok Eng CHEAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC ASSEMBLY WITH POWER MODULE INTERPOSER AND METHODS OF FOR...
- Publication number 20240145368
- Publication date May 2, 2024
- Intel Corporation
- Jackson Chung Peng KONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LIQUID METAL SHIELD FOR FINE PITCH INTERCONNECTS
- Publication number 20240145420
- Publication date May 2, 2024
- Intel Corporation
- Bok Eng CHEAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC PACKAGE WITH INTEGRATED INTERCONNECT STRUCTURE
- Publication number 20240136269
- Publication date Apr 25, 2024
- Intel Corporation
- Bok Eng CHEAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPOSITE BRIDGES FOR 3D STACKED INTEGRATED CIRCUIT POWER DELIVERY
- Publication number 20240071934
- Publication date Feb 29, 2024
- Intel Corporation
- Bok Eng CHEAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC ASSEMBLY HAVING A COOLING FEATURE AND METHODS OF FORMING...
- Publication number 20240071856
- Publication date Feb 29, 2024
- Intel Corporation
- Bok Eng CHEAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE-STACKED AND MOLDED ARCHITECTURE FOR MEMORY ON PACKAGE (MOP)
- Publication number 20240006399
- Publication date Jan 4, 2024
- Intel Corporation
- Seok Ling Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SHIELDING ASSEMBLY FOR SEMICONDUCTOR PACKAGES
- Publication number 20240006338
- Publication date Jan 4, 2024
- Intel Corporation
- Poh Boon KHOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE WITH EXTENDED STIFFENER
- Publication number 20240006341
- Publication date Jan 4, 2024
- Intel Corporation
- Bok Eng CHEAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPOSITE PRINTED CIRCUIT BOARDS AND DEVICES
- Publication number 20240006786
- Publication date Jan 4, 2024
- Intel Corporation
- Howe Yin LOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES FOR STACKED MEMORY-ON-PACKAGE (SMOP) AND MET...
- Publication number 20240006324
- Publication date Jan 4, 2024
- Intel Corporation
- Bok Eng CHEAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES FOR ALTERNATE STACKED MEMORY AND METHODS OF...
- Publication number 20240006376
- Publication date Jan 4, 2024
- Intel Corporation
- Seok Ling Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE WITH PSEUDO-STRIPLINE ARCHITECTURE
- Publication number 20230420379
- Publication date Dec 28, 2023
- Intel Corporation
- Eng Huat Goh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE WITH EMBEDDED CAPACITORS
- Publication number 20230411385
- Publication date Dec 21, 2023
- Intel Corporation
- Seok Ling Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID SEMICONDUCTOR PACKAGE FOR IMPROVED POWER INTEGRITY
- Publication number 20230187368
- Publication date Jun 15, 2023
- Intel Corporation
- Seok Ling LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FOLDABLE COMPRESSION ATTACHED MEMORY MODULE (FCAMM)
- Publication number 20230120513
- Publication date Apr 20, 2023
- Intel Corporation
- Jackson Chung Peng Kong
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
INTERCONNECTS BRIDGES FOR MULTI-CHIP PACKAGES
- Publication number 20230065380
- Publication date Mar 2, 2023
- Intel Corporation
- Bok Eng CHEAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPOSITE BRIDGE DIE-TO-DIE INTERCONNECTS FOR INTEGRATED-CIRCUIT PA...
- Publication number 20230048835
- Publication date Feb 16, 2023
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-CHIP PACKAGE WITH RECESSED MEMORY
- Publication number 20220406753
- Publication date Dec 22, 2022
- Intel Corporation
- Bok Eng CHEAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED BRIDGE FOR DIE-TO-DIE INTERCONNECTS
- Publication number 20220392835
- Publication date Dec 8, 2022
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOLDED SILICON INTERCONNECTS IN BRIDGES FOR INTEGRATED-CIRCUIT PACK...
- Publication number 20220302033
- Publication date Sep 22, 2022
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOLDED INTERCONNECTS IN BRIDGES FOR INTEGRATED-CIRCUIT PACKAGES
- Publication number 20220278084
- Publication date Sep 1, 2022
- Intel Corporation
- Jenny Shio Yin ONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D STACKED DIE PACKAGE WITH MOLDED INTEGRATED HEAT SPREADER
- Publication number 20220077113
- Publication date Mar 10, 2022
- Intel Corporation
- Jenny Shio Yin ONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOLDED POWER DELIVERY INTERCONNECT MODULE FOR IMPROVED IMAX AND POW...
- Publication number 20220077060
- Publication date Mar 10, 2022
- Intel Corporation
- Seok Ling LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICAL SHIELD FOR STACKED HETEROGENEOUS DEVICE INTEGRATION
- Publication number 20220068833
- Publication date Mar 3, 2022
- Intel Corporation
- Seok Ling LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE WITH CO-AXIAL BALL-GRID-ARRAY
- Publication number 20220071022
- Publication date Mar 3, 2022
- Intel Corporation
- Jackson Chung Peng KONG
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
VERTICAL POWER PLANE MODULE FOR SEMICONDUCTOR PACKAGES
- Publication number 20220068846
- Publication date Mar 3, 2022
- Intel Corporation
- Jenny Shio Yin ONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SEMICONDUCTOR PACKAGE WITH STEPPED STIFFENER
- Publication number 20220068841
- Publication date Mar 3, 2022
- Intel Corporation
- Jenny Shio Yin ONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
- Publication number 20220068750
- Publication date Mar 3, 2022
- Intel Corporation
- Jenny Shio Yin ONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE WITH HYBRID THROUGH-SILICON-VIAS
- Publication number 20220068764
- Publication date Mar 3, 2022
- Intel Corporation
- Seok Ling LIM
- H01 - BASIC ELECTRIC ELEMENTS

Seok Ling Lim

Person

Patents Grantslast 30 patents

Interposer structures and methods for 2.5D and 3D packaging

Integrated circuit packages with conductive element having cavities...

Embedded reference layers for semiconductor package substrates

Semiconductor miniaturization through component placement on steppe...

Frame-array interconnects for integrated-circuit packages

Multi-chip package with extended frame

Electrical shield for stacked heterogeneous device integration

Hybrid ball grid array package for high speed interconnects

Composite bridge die-to-die interconnects for integrated-circuit pa...

Molded power delivery interconnect module for improved Imax and pow...

Interposer for hybrid interconnect geometry

Multi-level components for integrated-circuit packages

Substrate cores for warpage control

Overhang bridge interconnect

Semiconductor package with hybrid through-silicon-vias

Vertical power plane module for semiconductor packages

Multi-faceted integrated-circuit dice and packages

Integrated bridge for die-to-die interconnects

Semiconductor package with co-axial ball-grid-array

Stiffener build-up layer package

Stiffener shield for device integration

Embedded reference layers for semiconductor package substrates

Package with wall-side capacitors

Plane-less voltage reference interconnects

Three-dimensional decoupling integration within hole in motherboard

Capacitors embedded in stiffeners for small form-factor and methods...

Stiffener-integrated interconnect bypasses for chip-package apparat...

Electronic packages with stacked sitffeners and methods of assembli...

Integrated circuit packages with conductive element having cavities...

Vertical modular stiffeners for stacked multi-device packages

Patents Applicationslast 30 patents

ELECTRONIC INTERCONNECT AND METHOD OF FORMING THE SAME

ELECTRONIC ASSEMBLY WITH POWER MODULE INTERPOSER AND METHODS OF FOR...

LIQUID METAL SHIELD FOR FINE PITCH INTERCONNECTS

ELECTRONIC PACKAGE WITH INTEGRATED INTERCONNECT STRUCTURE

COMPOSITE BRIDGES FOR 3D STACKED INTEGRATED CIRCUIT POWER DELIVERY

ELECTRONIC ASSEMBLY HAVING A COOLING FEATURE AND METHODS OF FORMING...

DIE-STACKED AND MOLDED ARCHITECTURE FOR MEMORY ON PACKAGE (MOP)

SHIELDING ASSEMBLY FOR SEMICONDUCTOR PACKAGES

SEMICONDUCTOR PACKAGE WITH EXTENDED STIFFENER

COMPOSITE PRINTED CIRCUIT BOARDS AND DEVICES

SEMICONDUCTOR PACKAGES FOR STACKED MEMORY-ON-PACKAGE (SMOP) AND MET...

SEMICONDUCTOR PACKAGES FOR ALTERNATE STACKED MEMORY AND METHODS OF...

INTEGRATED CIRCUIT PACKAGE WITH PSEUDO-STRIPLINE ARCHITECTURE

PACKAGE WITH EMBEDDED CAPACITORS

HYBRID SEMICONDUCTOR PACKAGE FOR IMPROVED POWER INTEGRITY

FOLDABLE COMPRESSION ATTACHED MEMORY MODULE (FCAMM)

INTERCONNECTS BRIDGES FOR MULTI-CHIP PACKAGES

COMPOSITE BRIDGE DIE-TO-DIE INTERCONNECTS FOR INTEGRATED-CIRCUIT PA...

MULTI-CHIP PACKAGE WITH RECESSED MEMORY

INTEGRATED BRIDGE FOR DIE-TO-DIE INTERCONNECTS

MOLDED SILICON INTERCONNECTS IN BRIDGES FOR INTEGRATED-CIRCUIT PACK...

MOLDED INTERCONNECTS IN BRIDGES FOR INTEGRATED-CIRCUIT PACKAGES

3D STACKED DIE PACKAGE WITH MOLDED INTEGRATED HEAT SPREADER

MOLDED POWER DELIVERY INTERCONNECT MODULE FOR IMPROVED IMAX AND POW...

ELECTRICAL SHIELD FOR STACKED HETEROGENEOUS DEVICE INTEGRATION

SEMICONDUCTOR PACKAGE WITH CO-AXIAL BALL-GRID-ARRAY

VERTICAL POWER PLANE MODULE FOR SEMICONDUCTOR PACKAGES

STACKED SEMICONDUCTOR PACKAGE WITH STEPPED STIFFENER

SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME

SEMICONDUCTOR PACKAGE WITH HYBRID THROUGH-SILICON-VIAS