Seth Eichmeyer

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Unused redundant enable disturb protection circuit
- Patent number 12,223,099
- Issue date Feb 11, 2025
- Micron Technology, Inc.
- Seth A. Eichmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Indicating a blocked repair operation
- Patent number 11,948,655
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Seth A. Eichmeyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for determining wafer defects
- Patent number 11,922,613
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Yutao Gong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selectable fuse sets, and related methods, devices, and systems
- Patent number 11,869,620
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Error evaluation for a memory system
- Patent number 11,829,243
- Issue date Nov 28, 2023
- Micron Technology, Inc.
- Matthew D. Jenkinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with a memory repair mechanism and methods for operat...
- Patent number 11,694,762
- Issue date Jul 4, 2023
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory apparatus with redundancy array
- Patent number 11,593,201
- Issue date Feb 28, 2023
- Micron Technology, Inc.
- Seth Eichmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjustable column address scramble using fuses
- Patent number 11,488,685
- Issue date Nov 1, 2022
- Micron Technology, Inc.
- James S. Rehmeyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and techniques for programming anti-fuses to repair a mem...
- Patent number 11,468,965
- Issue date Oct 11, 2022
- Micron Technology, Inc.
- Seth A. Eichmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selectable fuse sets, and related methods, devices, and systems
- Patent number 11,244,741
- Issue date Feb 8, 2022
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with a memory repair mechanism and methods for operat...
- Patent number 11,139,045
- Issue date Oct 5, 2021
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices with redundant memory cells for replacing defective...
- Patent number 11,114,181
- Issue date Sep 7, 2021
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with a row repair mechanism and methods for operating...
- Patent number 11,069,426
- Issue date Jul 20, 2021
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Adjustable column address scramble using fuses
- Patent number 11,017,879
- Issue date May 25, 2021
- Micron Technology, Inc.
- James S. Rehmeyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory apparatus with redundancy array
- Patent number 10,514,983
- Issue date Dec 24, 2019
- Micron Technology, Inc.
- Seth Eichmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for mapping memory addresses to redundant m...
- Patent number 9,230,692
- Issue date Jan 5, 2016
- Micron Technology, Inc.
- Seth Eichmeyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems, memories, and methods for operating memory arrays
- Patent number 8,942,054
- Issue date Jan 27, 2015
- Micron Technology, Inc.
- Victor Wong
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and memory devices for repairing memory cells
- Patent number 8,509,016
- Issue date Aug 13, 2013
- Micron Technology, Inc.
- Aron Lunde
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems, memories, and methods for refreshing memory arrays
- Patent number 8,208,334
- Issue date Jun 26, 2012
- Micron Technology, Inc.
- Victor Wong
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and memory devices for repairing memory cells
- Patent number 8,144,534
- Issue date Mar 27, 2012
- Micron Technology, Inc.
- Aron Lunde
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
TRACKING LATCH UPSET EVENTS USING BLOCK STATUS DATA
- Publication number 20250060893
- Publication date Feb 20, 2025
- Micron Technology, Inc.
- John M. Gonzales
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCK STATUS DATA RESET
- Publication number 20250061016
- Publication date Feb 20, 2025
- Micron Technology, Inc.
- John M. Gonzales
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRACKING LATCH UPSET EVENTS USING A TRIM REGISTER
- Publication number 20250061020
- Publication date Feb 20, 2025
- Micron Technology, Inc.
- John M. Gonzales
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCK STATUS PARITY DATA IN MEMORY
- Publication number 20250061058
- Publication date Feb 20, 2025
- Micron Technology, Inc.
- John M. Gonzales
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CORRECTING LATCH UPSET EVENTS IN A TRIM REGISTER
- Publication number 20250061017
- Publication date Feb 20, 2025
- Micron Technology, Inc.
- John M. Gonzales
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EOP PROBING ON MULTI-DIE STACKS
- Publication number 20240201252
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- John M. Gonzales
- G01 - MEASURING TESTING
Information Patent Application
APPARATUSES AND METHODS FOR DETERMINING WAFER DEFECTS
- Publication number 20240185406
- Publication date Jun 6, 2024
- Micron Technology, Inc.
- Yutao Gong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INDICATING A BLOCKED REPAIR OPERATION
- Publication number 20230343409
- Publication date Oct 26, 2023
- Micron Technology, Inc.
- Seth A. Eichmeyer
- G11 - INFORMATION STORAGE
Information Patent Application
UNUSED REDUNDANT ENABLE DISTURB PROTECTION CIRCUIT
- Publication number 20230315918
- Publication date Oct 5, 2023
- Micron Technology, Inc.
- Seth A. Eichmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR EVALUATION FOR A MEMORY SYSTEM
- Publication number 20230222032
- Publication date Jul 13, 2023
- Micron Technology, Inc.
- Matthew D. Jenkinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BINARY NEURAL NETWORK IN MEMORY
- Publication number 20220366224
- Publication date Nov 17, 2022
- Micron Technology, Inc.
- Dmitry Vengertsev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTABLE FUSE SETS, AND RELATED METHODS, DEVICES, AND SYSTEMS
- Publication number 20220139492
- Publication date May 5, 2022
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH A MEMORY REPAIR MECHANISM AND METHODS FOR OPERAT...
- Publication number 20210398603
- Publication date Dec 23, 2021
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Application
ADJUSTABLE COLUMN ADDRESS SCRAMBLE USING FUSES
- Publication number 20210257043
- Publication date Aug 19, 2021
- Micron Technology, Inc.
- James S. Rehmeyer
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR DETERMINING WAFER DEFECTS
- Publication number 20210201460
- Publication date Jul 1, 2021
- Micron Technology, Inc.
- Yutao Gong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH A MEMORY REPAIR MECHANISM AND METHODS FOR OPERAT...
- Publication number 20210158888
- Publication date May 27, 2021
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUS AND TECHNIQUES FOR PROGRAMMING ANTI-FUSES TO REPAIR A MEM...
- Publication number 20210110881
- Publication date Apr 15, 2021
- Micron Technology, Inc.
- Seth A. Eichmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY APPARATUS WITH REDUNDANCY ARRAY
- Publication number 20200081782
- Publication date Mar 12, 2020
- Micron Technology, Inc.
- Seth Eichmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY APPARATUS WITH REDUNDANCY ARRAY
- Publication number 20180314595
- Publication date Nov 1, 2018
- Micron Technology, Inc.
- Seth Eichmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR MAPPING MEMORY ADDRESSES TO REDUNDANT M...
- Publication number 20140369143
- Publication date Dec 18, 2014
- Micron Technology, Inc.
- Seth Eichmeyer
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS, MEMORIES, AND METHODS FOR REFRESHING MEMORY ARRAYS
- Publication number 20120263001
- Publication date Oct 18, 2012
- Micron Technology, Inc.
- Victor Wong
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS
- Publication number 20120176851
- Publication date Jul 12, 2012
- Micron Technology, Inc.
- Aron Lunde
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS, MEMORIES, AND METHODS FOR REFRESHING MEMORY ARRAYS
- Publication number 20110194367
- Publication date Aug 11, 2011
- Micron Technology, Inc.
- Victor Wong
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS
- Publication number 20110051538
- Publication date Mar 3, 2011
- Micron Technology, Inc.
- Aron Lunde
- G11 - INFORMATION STORAGE

Seth Eichmeyer

Person

Patents Grantslast 30 patents

Unused redundant enable disturb protection circuit

Indicating a blocked repair operation

Apparatuses and methods for determining wafer defects

Selectable fuse sets, and related methods, devices, and systems

Error evaluation for a memory system

Memory device with a memory repair mechanism and methods for operat...

Memory apparatus with redundancy array

Adjustable column address scramble using fuses

Apparatus and techniques for programming anti-fuses to repair a mem...

Selectable fuse sets, and related methods, devices, and systems

Memory device with a memory repair mechanism and methods for operat...

Memory devices with redundant memory cells for replacing defective...

Memory device with a row repair mechanism and methods for operating...

Adjustable column address scramble using fuses

Memory apparatus with redundancy array

Apparatuses and methods for mapping memory addresses to redundant m...

Systems, memories, and methods for operating memory arrays

Methods and memory devices for repairing memory cells

Systems, memories, and methods for refreshing memory arrays

Methods and memory devices for repairing memory cells

Patents Applicationslast 30 patents

TRACKING LATCH UPSET EVENTS USING BLOCK STATUS DATA

BLOCK STATUS DATA RESET

TRACKING LATCH UPSET EVENTS USING A TRIM REGISTER

BLOCK STATUS PARITY DATA IN MEMORY

CORRECTING LATCH UPSET EVENTS IN A TRIM REGISTER

EOP PROBING ON MULTI-DIE STACKS

APPARATUSES AND METHODS FOR DETERMINING WAFER DEFECTS

INDICATING A BLOCKED REPAIR OPERATION

UNUSED REDUNDANT ENABLE DISTURB PROTECTION CIRCUIT

ERROR EVALUATION FOR A MEMORY SYSTEM

BINARY NEURAL NETWORK IN MEMORY

SELECTABLE FUSE SETS, AND RELATED METHODS, DEVICES, AND SYSTEMS

MEMORY DEVICE WITH A MEMORY REPAIR MECHANISM AND METHODS FOR OPERAT...

ADJUSTABLE COLUMN ADDRESS SCRAMBLE USING FUSES

APPARATUSES AND METHODS FOR DETERMINING WAFER DEFECTS

MEMORY DEVICE WITH A MEMORY REPAIR MECHANISM AND METHODS FOR OPERAT...

APPARATUS AND TECHNIQUES FOR PROGRAMMING ANTI-FUSES TO REPAIR A MEM...

MEMORY APPARATUS WITH REDUNDANCY ARRAY

MEMORY APPARATUS WITH REDUNDANCY ARRAY

APPARATUSES AND METHODS FOR MAPPING MEMORY ADDRESSES TO REDUNDANT M...

SYSTEMS, MEMORIES, AND METHODS FOR REFRESHING MEMORY ARRAYS

METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS

SYSTEMS, MEMORIES, AND METHODS FOR REFRESHING MEMORY ARRAYS

METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS