Setsufumi Kamuro

Person

Chiba, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Gate array and manufacturing method of semiconductor memory device...
- Patent number 5,227,324
- Issue date Jul 13, 1993
- Sharp Kabushiki Kaisha
- Kazuya Fujimoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High speed output circuit without fluctuation for semiconductor int...
- Patent number 5,166,551
- Issue date Nov 24, 1992
- Sharp Kabushiki Kaisha
- Setsufumi Kamuro
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory management unit capable of expanding the offset part of the...
- Patent number 5,109,334
- Issue date Apr 28, 1992
- Sharp Kabushiki Kaisha
- Setsufumi Kamuro
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pulse detecting device for detecting and outputting a pulse signal...
- Patent number 4,988,901
- Issue date Jan 29, 1991
- Sharp Kabushiki Kaisha
- Setsufumi Kamuro
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Ion implantation programmable logic device
- Patent number 4,952,824
- Issue date Aug 28, 1990
- Sharp Kabushiki Kaisha
- Setsufumi Kamuro
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device
- Patent number 4,894,705
- Issue date Jan 16, 1990
- Sharp Kabushiki Kaisha
- Setsufumi Kamuro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Serial-to-parallel converter
- Patent number 4,775,990
- Issue date Oct 4, 1988
- Sharp Kabushiki Kaisha
- Setsufumi Kamuro
- G11 - INFORMATION STORAGE
Information Patent Grant
Enhancement-depletion CMOS circuit with fixed output
- Patent number 4,740,714
- Issue date Apr 26, 1988
- Sharp Kabushiki Kaisha
- Yoshifumi Masaki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reference voltage generating circuit for enhancement/depletion MOSF...
- Patent number 4,709,168
- Issue date Nov 24, 1987
- Sharp Kabushiki Kaisha
- Setsufumi Kamuro
- G05 - CONTROLLING REGULATING
Information Patent Grant
Peripheral unit for a microprocessor system
- Patent number 4,694,393
- Issue date Sep 15, 1987
- Sharp Kabushiki Kaisha
- Takaaki Hirano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serial data transfer circuits for delayed output
- Patent number 4,672,647
- Issue date Jun 9, 1987
- Sharp Kabushiki Kaisha
- Akira Yamaguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Address decoder circuit
- Patent number 4,651,031
- Issue date Mar 17, 1987
- Sharp Kabushiki Kaisha
- Setsufumi Kamuro
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power consumption CMOS shift register
- Patent number 4,630,295
- Issue date Dec 16, 1986
- Sharp Kabushiki Kaisha
- Setsufumi Kamuro
- G11 - INFORMATION STORAGE
Information Patent Grant
Cross-coupled inverters static random access memory
- Patent number 4,536,859
- Issue date Aug 20, 1985
- Sharp Kabushiki Kaisha
- Setsufumi Kamuro
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor chip selection circuit having programmable level cont...
- Patent number 4,482,822
- Issue date Nov 13, 1984
- Sharp Kabushiki Kaisha
- Setsufumi Kamuro
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory array addressing circuitry
- Patent number 4,453,236
- Issue date Jun 5, 1984
- Sharp Kabushiki Kaisha
- Munehiro Uratani
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device system
- Patent number 4,404,654
- Issue date Sep 13, 1983
- Sharp Kabushiki Kaisha
- Setsufumi Kamuro
- G11 - INFORMATION STORAGE
Information Patent Grant
MOS Transistor decoder circuit
- Patent number 4,309,629
- Issue date Jan 5, 1982
- Sharp Kabushiki Kaisha
- Setsufumi Kamuro
- G11 - INFORMATION STORAGE

Setsufumi Kamuro

Person

Patents Grantslast 30 patents

Gate array and manufacturing method of semiconductor memory device...

High speed output circuit without fluctuation for semiconductor int...

Memory management unit capable of expanding the offset part of the...

Pulse detecting device for detecting and outputting a pulse signal...

Ion implantation programmable logic device

Semiconductor device

Serial-to-parallel converter

Enhancement-depletion CMOS circuit with fixed output

Reference voltage generating circuit for enhancement/depletion MOSF...

Peripheral unit for a microprocessor system

Serial data transfer circuits for delayed output

Address decoder circuit

Low power consumption CMOS shift register

Cross-coupled inverters static random access memory

Semiconductor chip selection circuit having programmable level cont...

Memory array addressing circuitry

Semiconductor device system

MOS Transistor decoder circuit