Shagun Dusad

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Current-based track and hold circuit
- Patent number 11,916,567
- Issue date Feb 27, 2024
- Texas Instruments Incorporated
- Sai Aditya Krishnaswamy Nurani
- G11 - INFORMATION STORAGE
Information Patent Grant
Balun with improved common mode rejection ratio
- Patent number 11,888,459
- Issue date Jan 30, 2024
- Texas Instruments Incorporated
- Shagun Dusad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Calibration scheme for filling lookup table in an ADC
- Patent number 11,881,867
- Issue date Jan 23, 2024
- Texas Instruments Incorporated
- Narasimhan Rajagopal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Time gain compensation circuit in an ultrasound receiver
- Patent number 11,831,283
- Issue date Nov 28, 2023
- Texas Instruments Incorporated
- Vajeed Nimran
- G01 - MEASURING TESTING
Information Patent Grant
Clock filter with negative resistor circuit
- Patent number 11,489,515
- Issue date Nov 1, 2022
- Texas Instruments Incorporated
- Eeshan Miglani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Conversion and folding circuit for delay-based analog-to-digital co...
- Patent number 11,424,758
- Issue date Aug 23, 2022
- Texas Instruments Incorporated
- Shagun Dusad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Gain and memory error estimation in a pipeline analog to digital co...
- Patent number 11,309,902
- Issue date Apr 19, 2022
- Texas Instruments Incorporated
- Srinivas Kumar Reddy Naru
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Current-based track and hold circuit
- Patent number 11,277,145
- Issue date Mar 15, 2022
- Texas Instruments Incorporated
- Sai Aditya Krishnaswamy Nurani
- G11 - INFORMATION STORAGE
Information Patent Grant
Gain correction for multi-bit successive-approximation register
- Patent number 11,239,851
- Issue date Feb 1, 2022
- Texas Instruments Incorporated
- Srinivas Kumar Reddy Naru
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock filter with negative resistor circuit
- Patent number 11,139,799
- Issue date Oct 5, 2021
- Texas Instruments Incorporated
- Eeshan Miglani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Conversion and folding circuit for delay-based analog-to-digital co...
- Patent number 11,031,947
- Issue date Jun 8, 2021
- Texas Instruments Incorporated
- Shagun Dusad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Time gain compensation circuit in an ultrasound receiver
- Patent number 10,985,708
- Issue date Apr 20, 2021
- Texas Instruments Incorporated
- Vajeed Nimran
- G01 - MEASURING TESTING
Information Patent Grant
Transceiver with in-phase and quadrature-phase coupling correction
- Patent number 10,985,769
- Issue date Apr 20, 2021
- Texas Instruments Incorporated
- Raja Reddy Patukuri
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay-based residue stage
- Patent number 10,903,845
- Issue date Jan 26, 2021
- Texas Instruments Incorporated
- Visvesvaraya Appala Pentakota
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bias removal in PRBS based channel estimation
- Patent number 10,892,835
- Issue date Jan 12, 2021
- Texas Instruments Incorporated
- Shagun Dusad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Gain correction for multi-bit successive-approximation register
- Patent number 10,790,841
- Issue date Sep 29, 2020
- Texas Instruments Incorporated
- Srinivas Kumar Reddy Naru
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay-based residue stage
- Patent number 10,778,243
- Issue date Sep 15, 2020
- Texas Instruments Incorporated
- Visvesvaraya Appala Pentakota
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Top plate sampling analog-to-digital converter (ADC) with residue a...
- Patent number 10,686,461
- Issue date Jun 16, 2020
- Texas Instruments Incorporated
- Sai Aditya KrishnaSwamy Nurani
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Delay-based residue stage
- Patent number 10,673,453
- Issue date Jun 2, 2020
- Texas Instruments Incorporated
- Visvesvaraya Appala Pentakota
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Conversion and folding circuit for delay-based analog-to-digital co...
- Patent number 10,673,456
- Issue date Jun 2, 2020
- Texas Instruments Incorporated
- Shagun Dusad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transceiver with in-phase and quadrature-phase coupling correction
- Patent number 10,637,491
- Issue date Apr 28, 2020
- Texas Instruments Incorporated
- Raja Reddy Patukuri
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Gain and memory error estimation in a pipeline analog to digital co...
- Patent number 10,541,700
- Issue date Jan 21, 2020
- Texas Instruments Incorporated
- Srinivas Kumar Reddy Naru
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dynamic integrator with boosted output impedance of the transconduc...
- Patent number 10,523,231
- Issue date Dec 31, 2019
- Texas Instruments Incorporated
- Sai Aditya KrishnaSwamy Nurani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Continuous time linear capacitive digital step attenuator
- Patent number 10,476,542
- Issue date Nov 12, 2019
- Texas Instruments Incorporated
- Neeraj Shrivastava
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Negative capacitance circuits including temperature-compensation bi...
- Patent number 10,425,042
- Issue date Sep 24, 2019
- Texas Instruments Incorporated
- Ani Xavier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Counter-based SYSREF implementation
- Patent number 10,367,511
- Issue date Jul 30, 2019
- Texas Instruments Incorporated
- Shagun Dusad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay modulated clock division
- Patent number 10,341,082
- Issue date Jul 2, 2019
- Texas Instruments Incorporated
- Jaiganesh Balakrishnan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Pattern based estimation of errors in ADC
- Patent number 10,320,405
- Issue date Jun 11, 2019
- Texas Instruments Incorporated
- Srinivas Kumar Reddy Naru
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Feedforward cancellation of power supply noise in a voltage regulator
- Patent number 10,185,339
- Issue date Jan 22, 2019
- Texas Instruments Incorporated
- Shuaeb Fazeel
- G05 - CONTROLLING REGULATING
Information Patent Grant
Bias removal in PRBS based channel estimation
- Patent number 10,075,250
- Issue date Sep 11, 2018
- Texas Instruments Incorporated
- Shagun Dusad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Balun With Improved Common Mode Rejection Ratio
- Publication number 20240113678
- Publication date Apr 4, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Shagun Dusad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CALIBRATION SCHEME FOR FILLING LOOKUP TABLE IN AN ADC
- Publication number 20220247420
- Publication date Aug 4, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Narasimhan Rajagopal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOOKUP TABLE FOR NON-LINEAR SYSTEMS
- Publication number 20220247421
- Publication date Aug 4, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Visvesvaraya Appala Pentakota
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Balun With Improved Common Mode Rejection Ratio
- Publication number 20220173710
- Publication date Jun 2, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Shagun Dusad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Balun With Improved Common Mode Rejection Ratio
- Publication number 20220173711
- Publication date Jun 2, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Shagun Dusad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CURRENT-BASED TRACK AND HOLD CIRCUIT
- Publication number 20220131551
- Publication date Apr 28, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Sai Aditya Krishnaswamy NURANI
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK FILTER WITH NEGATIVE RESISTOR CIRCUIT
- Publication number 20210399720
- Publication date Dec 23, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Eeshan MIGLANI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CURRENT-BASED TRACK AND HOLD CIRCUIT
- Publication number 20210328595
- Publication date Oct 21, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Sai Aditya Krishnaswamy NURANI
- G11 - INFORMATION STORAGE
Information Patent Application
CONVERSION AND FOLDING CIRCUIT FOR DELAY-BASED ANALOG-TO-DIGITAL CO...
- Publication number 20210258018
- Publication date Aug 19, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Shagun DUSAD
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TIME GAIN COMPENSATION CIRCUIT IN AN ULTRASOUND RECEIVER
- Publication number 20210211102
- Publication date Jul 8, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Vajeed Nimran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CLOCK FILTER WITH NEGATIVE RESISTOR CIRCUIT
- Publication number 20210119612
- Publication date Apr 22, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Eeshan MIGLANI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GAIN CORRECTION FOR MULTI-BIT SUCCESSIVE-APPROXIMATION REGISTER
- Publication number 20200382128
- Publication date Dec 3, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Srinivas Kumar Reddy NARU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DELAY-BASED RESIDUE STAGE
- Publication number 20200358450
- Publication date Nov 12, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Visvesvaraya Appala PENTAKOTA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DELAY-BASED RESIDUE STAGE
- Publication number 20200259501
- Publication date Aug 13, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Visvesvaraya Appala PENTAKOTA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CONVERSION AND FOLDING CIRCUIT FOR DELAY-BASED ANALOG-TO-DIGITAL CO...
- Publication number 20200259502
- Publication date Aug 13, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Shagun DUSAD
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TRANSCEIVER WITH IN-PHASE AND QUADRATURE-PHASE COUPLING CORRECTION
- Publication number 20200228127
- Publication date Jul 16, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Raja Reddy PATUKURI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TOP PLATE SAMPLING ANALOG-TO-DIGITAL CONVERTER (ADC) WITH RESIDUE A...
- Publication number 20200212921
- Publication date Jul 2, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Sai Aditya KrishnaSwamy NURANI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
GAIN CORRECTION FOR MULTI-BIT SUCCESSIVE-APPROXIMATION REGISTER
- Publication number 20200136631
- Publication date Apr 30, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Srinivas Kumar Reddy NARU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
GAIN AND MEMORY ERROR ESTIMATION IN A PIPELINE ANALOG TO DIGITAL CO...
- Publication number 20200119743
- Publication date Apr 16, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Srinivas Kumar Reddy NARU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
NEGATIVE CAPACITANCE CIRCUITS INCLUDING TEMPERATURE-COMPENSATION BI...
- Publication number 20190363679
- Publication date Nov 28, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Ani Xavier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
GAIN AND MEMORY ERROR ESTIMATION IN A PIPELINE ANALOG TO DIGITAL CO...
- Publication number 20190280703
- Publication date Sep 12, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Srinivas Kumar Reddy NARU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DELAY MODULATED CLOCK DIVISION
- Publication number 20190273601
- Publication date Sep 5, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Jaiganesh BALAKRISHNAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
NEGATIVE CAPACITANCE CIRCUITS INCLUDING TEMPERATURE-COMPENSATION BI...
- Publication number 20190207564
- Publication date Jul 4, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Ani Xavier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Bias Removal in PRBS Based Channel Estimation
- Publication number 20180351667
- Publication date Dec 6, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Shagun DUSAD
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Counter-Based SYSREF Implementation
- Publication number 20180323790
- Publication date Nov 8, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Shagun DUSAD
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TIME GAIN COMPENSATION CIRCUIT IN AN ULTRASOUND RECEIVER
- Publication number 20180262169
- Publication date Sep 13, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Vajeed Nimran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BIAS REMOVAL IN PRBS BASED CHANNEL ESTIMATION
- Publication number 20180191472
- Publication date Jul 5, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Shagun DUSAD
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
COUNTER-BASED SYSREF IMPLEMENTATION
- Publication number 20180191355
- Publication date Jul 5, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Shagun DUSAD
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PATTERN BASED ESTIMATION OF ERRORS IN ADC
- Publication number 20180191362
- Publication date Jul 5, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Srinivas Kumar Reddy Naru
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SWITCHED CAPACITOR GAIN STAGE
- Publication number 20170359035
- Publication date Dec 14, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Shagun DUSAD
- G11 - INFORMATION STORAGE

Shagun Dusad

Person

Patents Grantslast 30 patents

Current-based track and hold circuit

Balun with improved common mode rejection ratio

Calibration scheme for filling lookup table in an ADC

Time gain compensation circuit in an ultrasound receiver

Clock filter with negative resistor circuit

Conversion and folding circuit for delay-based analog-to-digital co...

Gain and memory error estimation in a pipeline analog to digital co...

Current-based track and hold circuit

Gain correction for multi-bit successive-approximation register

Clock filter with negative resistor circuit

Conversion and folding circuit for delay-based analog-to-digital co...

Time gain compensation circuit in an ultrasound receiver

Transceiver with in-phase and quadrature-phase coupling correction

Delay-based residue stage

Bias removal in PRBS based channel estimation

Gain correction for multi-bit successive-approximation register

Delay-based residue stage

Top plate sampling analog-to-digital converter (ADC) with residue a...

Delay-based residue stage

Conversion and folding circuit for delay-based analog-to-digital co...

Transceiver with in-phase and quadrature-phase coupling correction

Gain and memory error estimation in a pipeline analog to digital co...

Dynamic integrator with boosted output impedance of the transconduc...

Continuous time linear capacitive digital step attenuator

Negative capacitance circuits including temperature-compensation bi...

Counter-based SYSREF implementation

Delay modulated clock division

Pattern based estimation of errors in ADC

Feedforward cancellation of power supply noise in a voltage regulator

Bias removal in PRBS based channel estimation

Patents Applicationslast 30 patents

Balun With Improved Common Mode Rejection Ratio

CALIBRATION SCHEME FOR FILLING LOOKUP TABLE IN AN ADC

LOOKUP TABLE FOR NON-LINEAR SYSTEMS

Balun With Improved Common Mode Rejection Ratio

Balun With Improved Common Mode Rejection Ratio

CURRENT-BASED TRACK AND HOLD CIRCUIT

CLOCK FILTER WITH NEGATIVE RESISTOR CIRCUIT

CURRENT-BASED TRACK AND HOLD CIRCUIT

CONVERSION AND FOLDING CIRCUIT FOR DELAY-BASED ANALOG-TO-DIGITAL CO...

TIME GAIN COMPENSATION CIRCUIT IN AN ULTRASOUND RECEIVER

CLOCK FILTER WITH NEGATIVE RESISTOR CIRCUIT

GAIN CORRECTION FOR MULTI-BIT SUCCESSIVE-APPROXIMATION REGISTER

DELAY-BASED RESIDUE STAGE

DELAY-BASED RESIDUE STAGE

CONVERSION AND FOLDING CIRCUIT FOR DELAY-BASED ANALOG-TO-DIGITAL CO...

TRANSCEIVER WITH IN-PHASE AND QUADRATURE-PHASE COUPLING CORRECTION

TOP PLATE SAMPLING ANALOG-TO-DIGITAL CONVERTER (ADC) WITH RESIDUE A...

GAIN CORRECTION FOR MULTI-BIT SUCCESSIVE-APPROXIMATION REGISTER

GAIN AND MEMORY ERROR ESTIMATION IN A PIPELINE ANALOG TO DIGITAL CO...

NEGATIVE CAPACITANCE CIRCUITS INCLUDING TEMPERATURE-COMPENSATION BI...

GAIN AND MEMORY ERROR ESTIMATION IN A PIPELINE ANALOG TO DIGITAL CO...

DELAY MODULATED CLOCK DIVISION

NEGATIVE CAPACITANCE CIRCUITS INCLUDING TEMPERATURE-COMPENSATION BI...

Bias Removal in PRBS Based Channel Estimation

Counter-Based SYSREF Implementation

TIME GAIN COMPENSATION CIRCUIT IN AN ULTRASOUND RECEIVER

BIAS REMOVAL IN PRBS BASED CHANNEL ESTIMATION

COUNTER-BASED SYSREF IMPLEMENTATION

PATTERN BASED ESTIMATION OF ERRORS IN ADC

SWITCHED CAPACITOR GAIN STAGE