Shailendra Srinivas

Person

Seattle, WA, US

People

Patents Grantslast 30 patents

Information Patent Grant
RFID tag clock frequency reduction during tuning
- Patent number 12,321,798
- Issue date Jun 3, 2025
- Impinj, Inc.
- John D. Hyde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RFID tag clock frequency reduction during tuning
- Patent number 11,853,826
- Issue date Dec 26, 2023
- Impinj, Inc.
- John D. Hyde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Direct digital synthesizer with frequency correction
- Patent number 11,811,415
- Issue date Nov 7, 2023
- BAE Systems Information and Electronic Systems Integration Inc.
- Shailendra Srinivas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RFID tag clock frequency reduction during tuning
- Patent number 10,929,734
- Issue date Feb 23, 2021
- Impinj, Inc.
- John D. Hyde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RFID tag clock frequency reduction during tuning
- Patent number 10,445,535
- Issue date Oct 15, 2019
- Impinj, Inc.
- John D. Hyde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RFID tag clock frequency reduction during tuning
- Patent number 10,002,266
- Issue date Jun 19, 2018
- Impinj, Inc.
- John D. Hyde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RFID integrated circuits with antenna contacts on multiple surfaces
- Patent number 9,875,438
- Issue date Jan 23, 2018
- Impinj, Inc.
- Christopher J. Diorio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RFID integrated circuits with antenna contacts on multiple surfaces
- Patent number 9,489,611
- Issue date Nov 8, 2016
- Impinj. Inc.
- Christopher J. Diorio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self tuning RFID tags
- Patent number 9,349,090
- Issue date May 24, 2016
- Impinj, Inc.
- Shailendra Srinivas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RFID integrated circuits with antenna contacts on multiple surfaces
- Patent number 9,053,400
- Issue date Jun 9, 2015
- Impinj, Inc.
- Christopher J. Diorio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self tuning RFID tags
- Patent number 8,952,792
- Issue date Feb 10, 2015
- Impinj, Inc.
- Shailendra Srinivas
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Voltage regulators using a resistive chain to bias a native transistor
- Patent number 8,072,329
- Issue date Dec 6, 2011
- Impinj, Inc.
- Shailendra Srinivas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Counteracting overtunneling in nonvolatile memory cells
- Patent number 7,573,749
- Issue date Aug 11, 2009
- Virage Logic Corporation
- Christopher J. Diorio
- G11 - INFORMATION STORAGE
Information Patent Grant
Counteracting overtunneling in nonvolatile memory cells using charg...
- Patent number 7,212,446
- Issue date May 1, 2007
- Impinj, Inc.
- Christopher J. Diorio
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Direct Digital Synthesizer With Frequency Correction
- Publication number 20220407524
- Publication date Dec 22, 2022
- BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC
- Shailendra Srinivas
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RFID INTEGRATED CIRCUITS AND TAGS WITH ANTENNA CONTACTS ON MULTIPLE...
- Publication number 20150248604
- Publication date Sep 3, 2015
- Impinj, Inc.
- Christopher J. Diorio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RFID INTEGRATED CIRCUITS WITH ANTENNA CONTACTS ON MULTIPLE SURFACES
- Publication number 20150227832
- Publication date Aug 13, 2015
- Impinj, Inc.
- Christopher J. Diorio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RFID INTEGRATED CIRCUITS WITH ANTENNA CONTACTS ON MULTIPLE SURFACES
- Publication number 20140070010
- Publication date Mar 13, 2014
- Impinj, Inc.
- Christopher J. Diorio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RFID INTEGRATED CIRCUITS WITH ANTENNA CONTACTS ON MULTIPLE SURFACES
- Publication number 20140073071
- Publication date Mar 13, 2014
- Christopher J. Diorio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Counteracting overtunneling in nonvolatile memory cells
- Publication number 20070171724
- Publication date Jul 26, 2007
- Impinj, Inc.
- Christopher J. Diorio
- G11 - INFORMATION STORAGE
Information Patent Application
PMOS memory cell
- Publication number 20050030827
- Publication date Feb 10, 2005
- Impinj, Inc., a Delaware Corporation
- Troy N. Gilliland
- G11 - INFORMATION STORAGE
Information Patent Application
Counteracting overtunneling in nonvolatile memory cells
- Publication number 20040195593
- Publication date Oct 7, 2004
- Impinj, Inc., a Delaware Corporation
- Christopher J. Diorio
- G11 - INFORMATION STORAGE

Shailendra Srinivas

Person

Patents Grantslast 30 patents

RFID tag clock frequency reduction during tuning

RFID tag clock frequency reduction during tuning

Direct digital synthesizer with frequency correction

RFID tag clock frequency reduction during tuning

RFID tag clock frequency reduction during tuning

RFID tag clock frequency reduction during tuning

RFID integrated circuits with antenna contacts on multiple surfaces

RFID integrated circuits with antenna contacts on multiple surfaces

Self tuning RFID tags

RFID integrated circuits with antenna contacts on multiple surfaces

Self tuning RFID tags

Voltage regulators using a resistive chain to bias a native transistor

Counteracting overtunneling in nonvolatile memory cells

Counteracting overtunneling in nonvolatile memory cells using charg...

Patents Applicationslast 30 patents

Direct Digital Synthesizer With Frequency Correction

RFID INTEGRATED CIRCUITS AND TAGS WITH ANTENNA CONTACTS ON MULTIPLE...

RFID INTEGRATED CIRCUITS WITH ANTENNA CONTACTS ON MULTIPLE SURFACES

RFID INTEGRATED CIRCUITS WITH ANTENNA CONTACTS ON MULTIPLE SURFACES

RFID INTEGRATED CIRCUITS WITH ANTENNA CONTACTS ON MULTIPLE SURFACES

Counteracting overtunneling in nonvolatile memory cells

PMOS memory cell

Counteracting overtunneling in nonvolatile memory cells