Shaishav Desai

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Domain clock and power activation control circuit to reduce voltage...
- Patent number 12,019,494
- Issue date Jun 25, 2024
- Microsoft Technology Licensing, LLC
- Charles Boecker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Peak voltage amplitude detectors tolerant to process variation and...
- Patent number 11,953,527
- Issue date Apr 9, 2024
- Microsoft Technology Licensing, LLC
- Ping Lu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital signal processors providing scalable decision feedback equa...
- Patent number 11,838,153
- Issue date Dec 5, 2023
- Microsoft Technology Licensing, LLC
- Md Masum Hossain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and circuits for adjusting parameters of a transceiver
- Patent number 10,320,370
- Issue date Jun 11, 2019
- MoSys, Inc.
- Prashant Choudhary
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hum generation using representative circuitry
- Patent number 9,960,771
- Issue date May 1, 2018
- Wave Computing, Inc.
- Gajendra Prasad Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock gater with test features and low setup time
- Patent number 8,341,578
- Issue date Dec 25, 2012
- Apple Inc.
- Brian J. Campbell
- G01 - MEASURING TESTING
Information Patent Grant
Low jitter large frequency tuning LC PLL for multi-speed clocking a...
- Patent number 8,044,724
- Issue date Oct 25, 2011
- MoSys, Inc.
- Chethan Rao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock gater with test features and low setup time
- Patent number 7,779,372
- Issue date Aug 17, 2010
- Apple Inc.
- Brian J. Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sense amplifier thermal correction scheme
- Patent number 7,136,774
- Issue date Nov 14, 2006
- Sun Microsystems, Inc.
- Claude R. Gauthier
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic circuit operation adjustment based on distributed on-chip t...
- Patent number 7,123,995
- Issue date Oct 17, 2006
- Sun Microsystems, Inc.
- Shaishav A. Desai
- G05 - CONTROLLING REGULATING
Information Patent Grant
Clock skew reduction technique based on distributed process monitors
- Patent number 7,069,459
- Issue date Jun 27, 2006
- Sun Microsystems, Inc.
- Claude R. Gauthier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive keeper sizing for dynamic circuits based on fused process...
- Patent number 6,914,452
- Issue date Jul 5, 2005
- Sun Microsystems, Inc.
- Claude R. Gauthier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Process monitor based keeper scheme for dynamic circuits
- Patent number 6,894,528
- Issue date May 17, 2005
- Sun Microsystems, Inc.
- Claude R. Gauthier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sense amplifier thermal correction scheme
- Patent number 6,879,929
- Issue date Apr 12, 2005
- Sun Microsystems
- Claude R. Gauthier
- G11 - INFORMATION STORAGE
Information Patent Grant
I/O receiver thermal correction scheme
- Patent number 6,850,856
- Issue date Feb 1, 2005
- Sun Microsystems, Inc.
- Claude R. Gauthier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic circuitry with on-chip temperature-controlled keeper device
- Patent number 6,759,877
- Issue date Jul 6, 2004
- Sun Microsystems, Inc.
- Shaishav A. Desai
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiple discharge capable bit line
- Patent number 6,654,301
- Issue date Nov 25, 2003
- Sun Microsystems, Inc.
- Farzad Chehrazi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory read circuitry
- Patent number 6,597,611
- Issue date Jul 22, 2003
- Sun Microsystems, Inc.
- Shaishav A. Desai
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory read circuitry
- Patent number 6,512,712
- Issue date Jan 28, 2003
- Sun Microsystems, Inc.
- Shaishav A. Desai
- G11 - INFORMATION STORAGE
Information Patent Grant
Secondary precharge mechanism for high speed multi-ported register...
- Patent number 6,466,497
- Issue date Oct 15, 2002
- Sun Microsystems, Inc.
- Shaishav A. Desai
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
PEAK VOLTAGE AMPLITUDE DETECTORS TOLERANT TO PROCESS VARIATION AND...
- Publication number 20240069074
- Publication date Feb 29, 2024
- Microsoft Technology Licensing, LLC
- Ping LU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DOMAIN CLOCK AND POWER ACTIVATION CONTROL CIRCUIT TO REDUCE VOLTAGE...
- Publication number 20240004449
- Publication date Jan 4, 2024
- Microsoft Technology Licensing, LLC
- Charles BOECKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC CONFIGURATION OF A RECONFIGURABLE HUM FABRIC
- Publication number 20180225403
- Publication date Aug 9, 2018
- Wave Computing, Inc.
- Christopher John Nicol
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAM COUNTER ALIGNMENT ACROSS A RECONFIGURABLE HUM FABRIC
- Publication number 20170364473
- Publication date Dec 21, 2017
- Wave Computing, Inc.
- Gajendra Prasad Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HUM GENERATION USING REPRESENTATIVE CIRCUITRY
- Publication number 20170288674
- Publication date Oct 5, 2017
- Wave Computing, Inc.
- Gajendra Prasad Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHODS AND CIRCUITS FOR ADJUSTING PARAMETERS OF A TRANSCEIVER
- Publication number 20130169314
- Publication date Jul 4, 2013
- MOSYS, INC.
- Prashant Choudhary
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW NOISE BIAS CIRCUIT FOR A PLL OSCILLATOR
- Publication number 20130076450
- Publication date Mar 28, 2013
- MoSys, Inc.
- Chethan Rao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Clock Gater with Test Features and Low Setup Time
- Publication number 20100277219
- Publication date Nov 4, 2010
- Brian J. Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW JITTER LARGE FREQUENCY TUNING LC PLL FOR MULTI-SPEED CLOCKING A...
- Publication number 20100073051
- Publication date Mar 25, 2010
- PRISM CIRCUITS, INC
- Chethan Rao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Clock Gater with Test Features and Low Setup Time
- Publication number 20080180159
- Publication date Jul 31, 2008
- Brian J. Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Sense amplifier thermal correction scheme
- Publication number 20050127980
- Publication date Jun 16, 2005
- SUN MICROSYSTEMS, INC.
- Claude R. Gauthier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Clock skew reduction technique based on distributed process monitors
- Publication number 20040181705
- Publication date Sep 16, 2004
- Claude R. Gauthier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock skew reduction technique based on local thermal profiling
- Publication number 20040181704
- Publication date Sep 16, 2004
- Claude R. Gauthier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC CIRCUITRY WITH ON-CHIP TEMPERATURE-CONTROLLED KEEPER DEVICE
- Publication number 20040130350
- Publication date Jul 8, 2004
- Shaishav A. Desai
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Sense amplifier thermal correction scheme
- Publication number 20040088134
- Publication date May 6, 2004
- SUN MICROSYSTEMS, INC.
- Claude R. Gauthier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Process monitor based keeper scheme for dynamic circuits
- Publication number 20040051562
- Publication date Mar 18, 2004
- SUN MICROSYSTEMS, INC.
- Claude R. Gauthier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Adaptive keeper sizing for dynamic circuits based on fused process...
- Publication number 20040051561
- Publication date Mar 18, 2004
- SUN MICROSYSTEMS, INC.
- Claude R. Gauthier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Memory read circuitry
- Publication number 20030067823
- Publication date Apr 10, 2003
- Shaishav A. Desai
- G11 - INFORMATION STORAGE
Information Patent Application
Multiple discharge capable bit line
- Publication number 20030058721
- Publication date Mar 27, 2003
- Farzad Chehrazi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY READ CIRCUITRY
- Publication number 20030016579
- Publication date Jan 23, 2003
- Shaishav A. Desai
- G11 - INFORMATION STORAGE

Shaishav Desai

Person

Patents Grantslast 30 patents

Domain clock and power activation control circuit to reduce voltage...

Peak voltage amplitude detectors tolerant to process variation and...

Digital signal processors providing scalable decision feedback equa...

Methods and circuits for adjusting parameters of a transceiver

Hum generation using representative circuitry

Clock gater with test features and low setup time

Low jitter large frequency tuning LC PLL for multi-speed clocking a...

Clock gater with test features and low setup time

Sense amplifier thermal correction scheme

Dynamic circuit operation adjustment based on distributed on-chip t...

Clock skew reduction technique based on distributed process monitors

Adaptive keeper sizing for dynamic circuits based on fused process...

Process monitor based keeper scheme for dynamic circuits

Sense amplifier thermal correction scheme

I/O receiver thermal correction scheme

Dynamic circuitry with on-chip temperature-controlled keeper device

Multiple discharge capable bit line

Memory read circuitry

Memory read circuitry

Secondary precharge mechanism for high speed multi-ported register...

Patents Applicationslast 30 patents

PEAK VOLTAGE AMPLITUDE DETECTORS TOLERANT TO PROCESS VARIATION AND...

DOMAIN CLOCK AND POWER ACTIVATION CONTROL CIRCUIT TO REDUCE VOLTAGE...

DYNAMIC CONFIGURATION OF A RECONFIGURABLE HUM FABRIC

PROGRAM COUNTER ALIGNMENT ACROSS A RECONFIGURABLE HUM FABRIC

HUM GENERATION USING REPRESENTATIVE CIRCUITRY

METHODS AND CIRCUITS FOR ADJUSTING PARAMETERS OF A TRANSCEIVER

LOW NOISE BIAS CIRCUIT FOR A PLL OSCILLATOR

Clock Gater with Test Features and Low Setup Time

LOW JITTER LARGE FREQUENCY TUNING LC PLL FOR MULTI-SPEED CLOCKING A...

Clock Gater with Test Features and Low Setup Time

Sense amplifier thermal correction scheme

Clock skew reduction technique based on distributed process monitors

Clock skew reduction technique based on local thermal profiling

DYNAMIC CIRCUITRY WITH ON-CHIP TEMPERATURE-CONTROLLED KEEPER DEVICE

Sense amplifier thermal correction scheme

Process monitor based keeper scheme for dynamic circuits

Adaptive keeper sizing for dynamic circuits based on fused process...

Memory read circuitry

Multiple discharge capable bit line

MEMORY READ CIRCUITRY