Shan-Yu Yu

Person

Taoyuan County, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Electrically stackable semiconductor wafer and chip packages
- Patent number 9,601,474
- Issue date Mar 21, 2017
- Invensas Corporation
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer leveled chip packaging structure and method thereof
- Patent number 9,059,181
- Issue date Jun 16, 2015
- Invensas Corporation
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-leveled chip packaging structure and method thereof
- Patent number 8,587,091
- Issue date Nov 19, 2013
- Invensas Corporation
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Test device having a plurality of tips of different heights
- Patent number 8,330,479
- Issue date Dec 11, 2012
- Chunghwa Picture Tubes, Ltd.
- Yoang-Coang Wen
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor package device
- Patent number 8,314,482
- Issue date Nov 20, 2012
- Invensas Corporation
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Testing apparatus having tips of different heights
- Patent number 8,159,246
- Issue date Apr 17, 2012
- Chunghwa Picture Tubes, Ltd.
- Yoang-Coang Wen
- G01 - MEASURING TESTING
Information Patent Grant
Structure for reducing stress for vias and fabricating method thereof
- Patent number 7,754,599
- Issue date Jul 13, 2010
- Industrial Technology Research Institute
- Yung-Yu Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Packaging structure and method of an image sensor module
- Patent number 7,572,676
- Issue date Aug 11, 2009
- Industrial Technology Research Institute
- Fang-Jun Leu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Image sensor packaging structure and method of manufacturing the same
- Patent number 7,544,529
- Issue date Jun 9, 2009
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure for reducing stress for vias and fabricating method thereof
- Patent number 7,545,039
- Issue date Jun 9, 2009
- Industrial Technology Research Institute
- Yung-Yu Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Wafer-leveled chip packaging structure and method thereof
- Patent number 7,528,009
- Issue date May 5, 2009
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Image sensor packaging structure
- Patent number 7,417,293
- Issue date Aug 26, 2008
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaging structure and method of an image sensor module
- Patent number 7,411,306
- Issue date Aug 12, 2008
- Industrial Technology Research Institute
- Fang-Jun Leu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-leveled chip packaging structure and method thereof
- Patent number 7,294,920
- Issue date Nov 13, 2007
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for removing polymer as etching residue
- Patent number 7,199,059
- Issue date Apr 3, 2007
- United Microelectronics Corp.
- Yi-Fang Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked package for electronic elements and packaging method thereof
- Patent number 7,091,592
- Issue date Aug 15, 2006
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Wafer Leveled Chip Packaging Structure and Method Thereof
- Publication number 20150364457
- Publication date Dec 17, 2015
- Invensas Corporation
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer Leveled Chip Packaging Structure and Method Thereof
- Publication number 20140217587
- Publication date Aug 7, 2014
- Invensas Corporation
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER-LEVELED CHIP PACKAGING STRUCTURE AND METHOD THEREOF
- Publication number 20120267765
- Publication date Oct 25, 2012
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TEST DEVICE
- Publication number 20120062264
- Publication date Mar 15, 2012
- CHUNGHWA PICTURE TUBES, LTD.
- Yoang-Coang Wen
- G01 - MEASURING TESTING
Information Patent Application
TEST DEVICE AND INSPECTION APPARATUS USING THE SAME
- Publication number 20110074454
- Publication date Mar 31, 2011
- CHUNGHWA PICTURE TUBES, LTD.
- Yoang-Coang Wen
- G01 - MEASURING TESTING
Information Patent Application
Structure for reducing stress for vias and fabricating method thereof
- Publication number 20090156001
- Publication date Jun 18, 2009
- Yung-Yu Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method And Device For Enhancing Solderability
- Publication number 20090050470
- Publication date Feb 26, 2009
- Industrial Technology Research Institute
- Tao-Chih Chang
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Wafer-leveled chip packaging structure and method thereof
- Publication number 20080029870
- Publication date Feb 7, 2008
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Packaging structure and method of an image sensor module
- Publication number 20070195188
- Publication date Aug 23, 2007
- Industrial Technology Research Institute
- Fang-Jun Leu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer-leveled chip packaging structure and method thereof
- Publication number 20070197018
- Publication date Aug 23, 2007
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IMAGE SENSOR PACKAGING STRUCTURE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20070190687
- Publication date Aug 16, 2007
- Industrial Technology Research Institute
- Shou-Lung CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure for reducing stress for vias and fabricating method thereof
- Publication number 20070108572
- Publication date May 17, 2007
- INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
- Yung-Yu Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method And Device For Enhancing Solderability
- Publication number 20070036952
- Publication date Feb 15, 2007
- Industrial Technology Research Institute
- Tao-Chih Chang
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Stacked package for electronic elements
- Publication number 20060220212
- Publication date Oct 5, 2006
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR REMOVING POLYMER AS ETCHING RESIDUE
- Publication number 20060089003
- Publication date Apr 27, 2006
- Yi-Fang Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Packaging structure and method of an image sensor module
- Publication number 20060030070
- Publication date Feb 9, 2006
- Industrial Technology Research Institute
- Fang-Jun Leu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Image sensor packaging structure and method of manufacturing the same
- Publication number 20060022290
- Publication date Feb 2, 2006
- INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer-leveled chip packaging structure and method thereof
- Publication number 20060019484
- Publication date Jan 26, 2006
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Image sensor packaging structure and method
- Publication number 20050236684
- Publication date Oct 27, 2005
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked package for electronic elements and packaging method thereof
- Publication number 20040238933
- Publication date Dec 2, 2004
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Electrically stackable semiconductor wafer and chip packages

Wafer leveled chip packaging structure and method thereof

Wafer-leveled chip packaging structure and method thereof

Test device having a plurality of tips of different heights

Semiconductor package device

Testing apparatus having tips of different heights

Structure for reducing stress for vias and fabricating method thereof

Packaging structure and method of an image sensor module

Image sensor packaging structure and method of manufacturing the same

Structure for reducing stress for vias and fabricating method thereof

Wafer-leveled chip packaging structure and method thereof

Image sensor packaging structure

Packaging structure and method of an image sensor module

Wafer-leveled chip packaging structure and method thereof

Method for removing polymer as etching residue

Stacked package for electronic elements and packaging method thereof

Patents Applicationslast 30 patents

Wafer Leveled Chip Packaging Structure and Method Thereof

Wafer Leveled Chip Packaging Structure and Method Thereof

WAFER-LEVELED CHIP PACKAGING STRUCTURE AND METHOD THEREOF

TEST DEVICE

TEST DEVICE AND INSPECTION APPARATUS USING THE SAME

Structure for reducing stress for vias and fabricating method thereof

Method And Device For Enhancing Solderability

Wafer-leveled chip packaging structure and method thereof

Packaging structure and method of an image sensor module

Wafer-leveled chip packaging structure and method thereof

IMAGE SENSOR PACKAGING STRUCTURE AND METHOD OF MANUFACTURING THE SAME

Structure for reducing stress for vias and fabricating method thereof

Method And Device For Enhancing Solderability

Stacked package for electronic elements

METHOD FOR REMOVING POLYMER AS ETCHING RESIDUE

Packaging structure and method of an image sensor module

Image sensor packaging structure and method of manufacturing the same

Wafer-leveled chip packaging structure and method thereof

Image sensor packaging structure and method

Stacked package for electronic elements and packaging method thereof