Shashank Ekbote

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Three-dimensional (3D), vertically-integrated field-effect transist...
- Patent number 10,861,852
- Issue date Dec 8, 2020
- QUALCOMM Incorporated
- Xia Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing or avoiding mechanical stress in static random access memo...
- Patent number 10,490,558
- Issue date Nov 26, 2019
- QUALCOMM Incorporated
- Youn Sung Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFET with reduced series total resistance
- Patent number 10,304,957
- Issue date May 28, 2019
- QUALCOMM Incorporated
- Ukjin Roh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field-effect transistor (FET) devices employing adjacent asymmetric...
- Patent number 10,062,768
- Issue date Aug 28, 2018
- QUALCOMM Incorporated
- Youn Sung Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form silicide and contact at embedded epitaxial facet
- Patent number 10,008,499
- Issue date Jun 26, 2018
- Texas Instruments Incorporated
- Kwan-Yong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dummy gate placement methodology to enhance integrated circuit perf...
- Patent number 9,947,765
- Issue date Apr 17, 2018
- Texas Instruments Incorporated
- Younsung Choi
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Integration of analog transistor
- Patent number 9,922,971
- Issue date Mar 20, 2018
- Texas Instruments Incorporated
- Himadri Sekhar Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fin field effect transistors (FETs) (FinFETs) employing dielectric...
- Patent number 9,882,051
- Issue date Jan 30, 2018
- QUALCOMM Incorporated
- Ukjin Roh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fin field effect transistors (FETs) (FinFETs) employing dielectric...
- Patent number 9,853,152
- Issue date Dec 26, 2017
- QUALCOMM Incorporated
- Ukjin Roh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form silicide and contact at embedded epitaxial facet
- Patent number 9,812,452
- Issue date Nov 7, 2017
- Texas Instruments Incorporated
- Kwan-Yong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field-effect transistor (FET) devices employing adjacent asymmetric...
- Patent number 9,634,138
- Issue date Apr 25, 2017
- QUALCOMM Incorporated
- Youn Sung Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form silicide and contact at embedded epitaxial facet
- Patent number 9,508,601
- Issue date Nov 29, 2016
- Texas Instruments Incorporated
- Kwan-Yong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dummy gate placement methodology to enhance integrated circuit perf...
- Patent number 9,496,142
- Issue date Nov 15, 2016
- Texas Instruments Incorporated
- Younsung Choi
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Integration of analog transistor
- Patent number 9,412,741
- Issue date Aug 9, 2016
- Texas Instruments Incorporated
- Himadri Sekhar Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicide formation due to improved SiGe faceting
- Patent number 9,406,769
- Issue date Aug 2, 2016
- Texas Instruments Incorporated
- Shashank S. Ekbote
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit and method of forming the integrated circuit wit...
- Patent number 9,224,653
- Issue date Dec 29, 2015
- Texas Instruments Incorporated
- Himadri Sekhar Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration of analog transistor
- Patent number 9,202,810
- Issue date Dec 1, 2015
- Texas Instruments Incorporated
- Himadri Sekhar Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicide formation due to improved SiGe faceting
- Patent number 9,202,883
- Issue date Dec 1, 2015
- Texas Instruments Incorporated
- Shashank S. Ekbote
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Native devices having improved device characteristics and methods f...
- Patent number 9,136,382
- Issue date Sep 15, 2015
- QUALCOMM Incorporated
- Shashank S. Ekbote
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicide formation due to improved SiGe faceting
- Patent number 9,093,298
- Issue date Jul 28, 2015
- Texas Instruments Incorporated
- Shashank S. Ekbote
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit and method of forming the integrated circuit wit...
- Patent number 9,076,670
- Issue date Jul 7, 2015
- Texas Instruments Incorporated
- Himadri Sekhar Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit having silicide block resistor
- Patent number 8,748,256
- Issue date Jun 10, 2014
- Texas Instruments Incorporated
- Song Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory and logic with shared cryogenic implants
- Patent number 8,748,253
- Issue date Jun 10, 2014
- Texas Instruments Incorporated
- Shashank Sureshchandra Ekbote
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Native devices having improved device characteristics and methods f...
- Patent number 8,541,269
- Issue date Sep 24, 2013
- QUALCOMM Incorporated
- Shashank S. Ekbote
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low cost transistors using gate orientation and optimized implants
- Patent number 8,405,154
- Issue date Mar 26, 2013
- Texas Instruments Incorporated
- Kamel Benaissa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mitigation of gate to contact capacitance in CMOS flow
- Patent number 8,119,470
- Issue date Feb 21, 2012
- Texas Instruments Incorporated
- Shashank Sureshchandra Ekbote
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Differential poly doping and circuits therefrom
- Patent number 8,114,729
- Issue date Feb 14, 2012
- Texas Instruments Incorporated
- Shashank Ekbote
- G11 - INFORMATION STORAGE
Information Patent Grant
Low cost transistors using gate orientation and optimized implants
- Patent number 7,994,009
- Issue date Aug 9, 2011
- Kamel Benaissa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a metal silicide
- Patent number 7,897,513
- Issue date Mar 1, 2011
- Texas Instruments Incorporated
- Haowen Bu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to improve transistor tox using SI recessing with no additio...
- Patent number 7,892,930
- Issue date Feb 22, 2011
- Texas Instruments Incorporated
- Borna Obradovic
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
THREE-DIMENSIONAL (3D), VERTICALLY-INTEGRATED FIELD-EFFECT TRANSIST...
- Publication number 20200144264
- Publication date May 7, 2020
- QUALCOMM Incorporated
- Xia Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCING OR AVOIDING MECHANICAL STRESS IN STATIC RANDOM ACCESS MEMO...
- Publication number 20180350819
- Publication date Dec 6, 2018
- QUALCOMM Incorporated
- Youn Sung Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET WITH REDUCED SERIES TOTAL RESISTANCE
- Publication number 20180076326
- Publication date Mar 15, 2018
- QUALCOMM Incorporated
- Ukjin Roh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIELD-EFFECT TRANSISTOR (FET) DEVICES EMPLOYING ADJACENT ASYMMETRIC...
- Publication number 20180061943
- Publication date Mar 1, 2018
- QUALCOMM Incorporated
- Youn Sung Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO FORM SILICIDE AND CONTACT AT EMBEDDED EPITAXIAL FACET
- Publication number 20180047728
- Publication date Feb 15, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Kwan-Yong LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUMMY GATE PLACEMENT METHODOLOGY TO ENHANCE INTEGRATED CIRCUIT PERF...
- Publication number 20170062582
- Publication date Mar 2, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Younsung CHOI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD TO FORM SILICIDE AND CONTACT AT EMBEDDED EPITAXIAL FACET
- Publication number 20170047329
- Publication date Feb 16, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Kwan-Yong LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATION OF ANALOG TRANSISTOR
- Publication number 20160322352
- Publication date Nov 3, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Himadri Sekhar PAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIGATE TRANSISTOR DEVICE AND METHOD OF ISOLATING ADJACENT TRANSI...
- Publication number 20160093511
- Publication date Mar 31, 2016
- QUALCOMM Incorporated
- Samit SENGUPTA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATION OF ANALOG TRANSISTOR
- Publication number 20160043076
- Publication date Feb 11, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Himadri Sekhar PAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICIDE FORMATION DUE TO IMPROVED SiGe FACETING
- Publication number 20160027888
- Publication date Jan 28, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Shashank S. EKBOTE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATION OF ANALOG TRANSISTOR
- Publication number 20150287717
- Publication date Oct 8, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Himadri Sekhar PAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICIDE FORMATION DUE TO IMPROVED SIGE FACETING
- Publication number 20150287801
- Publication date Oct 8, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Shashank S. EKBOTE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT AND METHOD OF FORMING THE INTEGRATED CIRCUIT WIT...
- Publication number 20150270174
- Publication date Sep 24, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Himadri Sekhar Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUMMY GATE PLACEMENT METHODOLOGY TO ENHANCE INTEGRATED CIRCUIT PERF...
- Publication number 20150187585
- Publication date Jul 2, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Younsung CHOI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD TO FORM SILICIDE AND CONTACT AT EMBEDDED EPITAXIAL FACET
- Publication number 20150170972
- Publication date Jun 18, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Kwan-Yong LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICIDE FORMATION DUE TO IMPROVED SiGe FACETING
- Publication number 20150054084
- Publication date Feb 26, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Shashank S. EKBOTE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT AND METHOD OF FORMING THE INTEGRATED CIRCUIT WIT...
- Publication number 20150021706
- Publication date Jan 22, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Himadri Sekhar Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reduction of Proximity Effects in Field-Effect Transistors with Emb...
- Publication number 20140054710
- Publication date Feb 27, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Youn Sung Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NATIVE DEVICES HAVING IMPROVED DEVICE CHARACTERISTICS AND METHODS F...
- Publication number 20140035067
- Publication date Feb 6, 2014
- QUALCOMM Incorporated
- Shashank S. Ekbote
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT HAVING SILICIDE BLOCK RESISTOR
- Publication number 20130200466
- Publication date Aug 8, 2013
- TEXAS INSTRUMENTS INCORPORATED
- SONG ZHAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Native Devices Having Improved Device Characteristics and Methods f...
- Publication number 20110266635
- Publication date Nov 3, 2011
- QUALCOMM Incorporated
- Shashank S. Ekbote
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW COST TRANSISTORS USING GATE ORIENTATION AND OPTIMIZED IMPLANTS
- Publication number 20110248347
- Publication date Oct 13, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Kamel BENAISSA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO IMPROVE TRANSISTOR TOX USING SI RECESSING WITH NO ADDITIO...
- Publication number 20110027954
- Publication date Feb 3, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Borna Obradovic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW COST TRANSISTORS USING GATE ORIENTATION AND OPTIMIZED IMPLANTS
- Publication number 20100327374
- Publication date Dec 30, 2010
- Kamel Benaissa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOS DEVICE AND PROCESS HAVING LOW RESISTANCE SILICIDE INTERFACE USI...
- Publication number 20100109089
- Publication date May 6, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Borna Obradovic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Device Having Pocketless Regions and Methods of Making the Device
- Publication number 20090263946
- Publication date Oct 22, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Kamel Benaissa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFERENTIAL OFFSET SPACER
- Publication number 20090098695
- Publication date Apr 16, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Shashank Ekbote
- G11 - INFORMATION STORAGE
Information Patent Application
DIFFERENTIAL POLY DOPING AND CIRCUITS THEREFROM
- Publication number 20090096031
- Publication date Apr 16, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Shashank EKBOTE
- G11 - INFORMATION STORAGE
Information Patent Application
CD GATE BIAS REDUCTION AND DIFFERENTIAL N+ POLY DOPING FOR CMOS CIR...
- Publication number 20090098694
- Publication date Apr 16, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Shashank Ekbote
- G11 - INFORMATION STORAGE

Shashank Ekbote

Person

Patents Grantslast 30 patents

Three-dimensional (3D), vertically-integrated field-effect transist...

Reducing or avoiding mechanical stress in static random access memo...

FinFET with reduced series total resistance

Field-effect transistor (FET) devices employing adjacent asymmetric...

Method to form silicide and contact at embedded epitaxial facet

Dummy gate placement methodology to enhance integrated circuit perf...

Integration of analog transistor

Fin field effect transistors (FETs) (FinFETs) employing dielectric...

Fin field effect transistors (FETs) (FinFETs) employing dielectric...

Method to form silicide and contact at embedded epitaxial facet

Field-effect transistor (FET) devices employing adjacent asymmetric...

Method to form silicide and contact at embedded epitaxial facet

Dummy gate placement methodology to enhance integrated circuit perf...

Integration of analog transistor

Silicide formation due to improved SiGe faceting

Integrated circuit and method of forming the integrated circuit wit...

Integration of analog transistor

Silicide formation due to improved SiGe faceting

Native devices having improved device characteristics and methods f...

Silicide formation due to improved SiGe faceting

Integrated circuit and method of forming the integrated circuit wit...

Integrated circuit having silicide block resistor

Memory and logic with shared cryogenic implants

Native devices having improved device characteristics and methods f...

Low cost transistors using gate orientation and optimized implants

Mitigation of gate to contact capacitance in CMOS flow

Differential poly doping and circuits therefrom

Low cost transistors using gate orientation and optimized implants

Method for forming a metal silicide

Method to improve transistor tox using SI recessing with no additio...

Patents Applicationslast 30 patents

THREE-DIMENSIONAL (3D), VERTICALLY-INTEGRATED FIELD-EFFECT TRANSIST...

REDUCING OR AVOIDING MECHANICAL STRESS IN STATIC RANDOM ACCESS MEMO...

FINFET WITH REDUCED SERIES TOTAL RESISTANCE

FIELD-EFFECT TRANSISTOR (FET) DEVICES EMPLOYING ADJACENT ASYMMETRIC...

METHOD TO FORM SILICIDE AND CONTACT AT EMBEDDED EPITAXIAL FACET

DUMMY GATE PLACEMENT METHODOLOGY TO ENHANCE INTEGRATED CIRCUIT PERF...

METHOD TO FORM SILICIDE AND CONTACT AT EMBEDDED EPITAXIAL FACET

INTEGRATION OF ANALOG TRANSISTOR

MULTIGATE TRANSISTOR DEVICE AND METHOD OF ISOLATING ADJACENT TRANSI...

INTEGRATION OF ANALOG TRANSISTOR

SILICIDE FORMATION DUE TO IMPROVED SiGe FACETING

INTEGRATION OF ANALOG TRANSISTOR

SILICIDE FORMATION DUE TO IMPROVED SIGE FACETING

INTEGRATED CIRCUIT AND METHOD OF FORMING THE INTEGRATED CIRCUIT WIT...

DUMMY GATE PLACEMENT METHODOLOGY TO ENHANCE INTEGRATED CIRCUIT PERF...

METHOD TO FORM SILICIDE AND CONTACT AT EMBEDDED EPITAXIAL FACET

SILICIDE FORMATION DUE TO IMPROVED SiGe FACETING

INTEGRATED CIRCUIT AND METHOD OF FORMING THE INTEGRATED CIRCUIT WIT...

Reduction of Proximity Effects in Field-Effect Transistors with Emb...

NATIVE DEVICES HAVING IMPROVED DEVICE CHARACTERISTICS AND METHODS F...

INTEGRATED CIRCUIT HAVING SILICIDE BLOCK RESISTOR

Native Devices Having Improved Device Characteristics and Methods f...

LOW COST TRANSISTORS USING GATE ORIENTATION AND OPTIMIZED IMPLANTS

METHOD TO IMPROVE TRANSISTOR TOX USING SI RECESSING WITH NO ADDITIO...

LOW COST TRANSISTORS USING GATE ORIENTATION AND OPTIMIZED IMPLANTS

MOS DEVICE AND PROCESS HAVING LOW RESISTANCE SILICIDE INTERFACE USI...

Device Having Pocketless Regions and Methods of Making the Device

DIFFERENTIAL OFFSET SPACER

DIFFERENTIAL POLY DOPING AND CIRCUITS THEREFROM

CD GATE BIAS REDUCTION AND DIFFERENTIAL N+ POLY DOPING FOR CMOS CIR...