Shaul Yifrach

Person

Haifa, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Bus controller and related methods
- Patent number 11,347,667
- Issue date May 31, 2022
- QUALCOMM Incorporated
- Tomer Rafael Ben-Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Time synchronization for clocks separated by a communication link
- Patent number 11,287,842
- Issue date Mar 29, 2022
- QUALCOMM Incorporated
- Yiftach Benjamini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power PCIe
- Patent number 10,963,035
- Issue date Mar 30, 2021
- QUALCOMM Incorporated
- Lalan Jee Mishra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extended message signaled interrupts (MSI) message data
- Patent number 10,922,252
- Issue date Feb 16, 2021
- QUALCOMM Incorporated
- Ofer Rosenberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Time synchronization for clocks separated by a communication link
- Patent number 10,795,400
- Issue date Oct 6, 2020
- QUALCOMM Incorporated
- Yiftach Benjamini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Alternate acknowledgment (ACK) signals in a coalescing transmission...
- Patent number 10,645,200
- Issue date May 5, 2020
- QUALCOMM Incorporated
- Amit Gil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Replacement physical layer (PHY) for low-speed peripheral component...
- Patent number 10,310,585
- Issue date Jun 4, 2019
- QUALCOMM Incorporated
- Shaul Yohai Yifrach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inline cryptographic engine (ICE) for peripheral component intercon...
- Patent number 10,157,153
- Issue date Dec 18, 2018
- QUALCOMM Incorporated
- Assaf Shacham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communicating transaction-specific attributes in a peripheral compo...
- Patent number 10,089,275
- Issue date Oct 2, 2018
- QUALCOMM Incorporated
- Ofer Rosenberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware-based translation lookaside buffer (TLB) invalidation
- Patent number 10,042,777
- Issue date Aug 7, 2018
- QUALCOMM Incorporated
- Assaf Shacham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware-based packet processing circuitry
- Patent number 9,998,573
- Issue date Jun 12, 2018
- QUALCOMM Incorporated
- Tomer Rafael Ben-Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Placement driven routing
- Patent number 7,904,865
- Issue date Mar 8, 2011
- International Business Machines Corporation
- Shaul Yifrach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device, system, and method of handling delayed transactions
- Patent number 7,747,803
- Issue date Jun 29, 2010
- International Business Machines Corporation
- Etai Adar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device, system, and method of handling transactions
- Patent number 7,734,854
- Issue date Jun 8, 2010
- International Business Machines Corporation
- Etai Adar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of optimizing buffer usage of virtual channels of a physical...
- Patent number 7,562,168
- Issue date Jul 14, 2009
- International Business Machines Corporation
- Shaul Yifrach
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Fast path memory read request processing in a multi-level memory ar...
- Patent number 7,500,062
- Issue date Mar 3, 2009
- International Business Machines Corporation
- Bruce Leroy Beukema
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for dynamic management of TCP reassembly buffers
- Patent number 7,496,108
- Issue date Feb 24, 2009
- International Business Machines Corporation
- Giora Biran
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TIME SYNCHRONIZATION FOR CLOCKS SEPARATED BY A COMMUNICATION LINK
- Publication number 20200341506
- Publication date Oct 29, 2020
- QUALCOMM Incorporated
- Yiftach Benjamini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDED MESSAGE SIGNALED INTERRUPTS (MSI) MESSAGE DATA
- Publication number 20200192838
- Publication date Jun 18, 2020
- QUALCOMM Incorporated
- Ofer Rosenberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING LATENCY ON LONG DISTANCE POINT-TO-POINT LINKS
- Publication number 20200153593
- Publication date May 14, 2020
- QUALCOMM Incorporated
- Yiftach Benjamini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIME SYNCHRONIZATION FOR CLOCKS SEPARATED BY A COMMUNICATION LINK
- Publication number 20190332137
- Publication date Oct 31, 2019
- QUALCOMM Incorporated
- Yiftach Benjamini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPLIT READ TRANSACTIONS OVER AN AUDIO COMMUNICATION BUS
- Publication number 20190250876
- Publication date Aug 15, 2019
- QUALCOMM Incorporated
- Lior Amarilio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUS CONTROLLER AND RELATED METHODS
- Publication number 20190213150
- Publication date Jul 11, 2019
- QUALCOMM Incorporated
- Tomer Rafael BEN-CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER PCIE
- Publication number 20190107882
- Publication date Apr 11, 2019
- QUALCOMM Incorporated
- Lalan Jee MISHRA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALTERNATE ACKNOWLEDGMENT (ACK) SIGNALS IN A COALESCING TRANSMISSION...
- Publication number 20190058780
- Publication date Feb 21, 2019
- QUALCOMM Incorporated
- Amit Gil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REPLACEMENT PHYSICAL LAYER (PHY) FOR LOW-SPEED PERIPHERAL COMPONENT...
- Publication number 20180120921
- Publication date May 3, 2018
- QUALCOMM Incorporated
- Shaul Yohai Yifrach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE-BASED PACKET PROCESSING CIRCUITRY
- Publication number 20180041614
- Publication date Feb 8, 2018
- QUALCOMM Incorporated
- Tomer Rafael Ben-Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
VIRTUALIZED INTERNET PROTOCOL (IP) PACKET PROCESSING SYSTEM
- Publication number 20180041431
- Publication date Feb 8, 2018
- QUALCOMM Incorporated
- Shaul Yohai Yifrach
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HARDWARE-BASED TRANSLATION LOOKASIDE BUFFER (TLB) INVALIDATION
- Publication number 20170286314
- Publication date Oct 5, 2017
- QUALCOMM Incorporated
- Assaf Shacham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INLINE CRYPTOGRAPHIC ENGINE (ICE) FOR PERIPHERAL COMPONENT INTERCON...
- Publication number 20170220494
- Publication date Aug 3, 2017
- QUALCOMM Incorporated
- Assaf Shacham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDED MESSAGE SIGNALED INTERRUPTS (MSI) MESSAGE DATA
- Publication number 20160371208
- Publication date Dec 22, 2016
- QUALCOMM Incorporated
- Ofer Rosenberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMUNICATING TRANSACTION-SPECIFIC ATTRIBUTES IN A PERIPHERAL COMPO...
- Publication number 20160371221
- Publication date Dec 22, 2016
- QUALCOMM Incorporated
- Ofer Rosenberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COHERENCY DRIVEN ENHANCEMENTS TO A PERIPHERAL COMPONENT INTERCONNEC...
- Publication number 20160371222
- Publication date Dec 22, 2016
- QUALCOMM Incorporated
- Shaul Yohai Yifrach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HEAD-OF-LINE BLOCKING (HOLB) MITIGATION IN COMMUNICATION DEVICES
- Publication number 20160337257
- Publication date Nov 17, 2016
- QUALCOMM Incorporated
- Shaul Yohai Yifrach
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DYNAMIC INDEX SELECTION IN A HARDWARE CACHE
- Publication number 20130036271
- Publication date Feb 7, 2013
- International Business Machines Corporation
- MVV A. Krishna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Secondary Cache Memory With A Counter For Determining Whether to Re...
- Publication number 20120124291
- Publication date May 17, 2012
- International Business Machines Corporation
- Heather D. Achilles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATED ADVANCE LINK ACTIVATION
- Publication number 20090185487
- Publication date Jul 23, 2009
- International Business Machines Corporation
- Etai Adar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE LINK WIDTH CONTROL
- Publication number 20090187683
- Publication date Jul 23, 2009
- International Business Machines Corporation
- Etai Adar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PLACEMENT DRIVEN ROUTING
- Publication number 20090187870
- Publication date Jul 23, 2009
- International Business Machines Corporation
- Shaul Yifrach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Device, System, and Method of Handling Transactions
- Publication number 20090177822
- Publication date Jul 9, 2009
- International Business Machines Corporation
- Etai Adar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Device, System, and Method of Handling Delayed Transactions
- Publication number 20090138641
- Publication date May 28, 2009
- International Business Machines Corporation
- Etai Adar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method Circuit and System for Data Flow Control
- Publication number 20080247316
- Publication date Oct 9, 2008
- Michael Bar-Joshua
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Fast path memory read request processing in a multi-level memory ar...
- Publication number 20070113019
- Publication date May 17, 2007
- International Business Machines Corporation
- Bruce Leroy Beukema
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of offloading iSCSI TCP/IP processing from a host processing...
- Publication number 20060056435
- Publication date Mar 16, 2006
- International Business Machines Corporation
- Giora Biran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Dynamic management of TCP reassembly buffers
- Publication number 20050147100
- Publication date Jul 7, 2005
- International Business Machines Corporation
- Giora Biran
- G06 - COMPUTING CALCULATING COUNTING

Shaul Yifrach

Person

Patents Grantslast 30 patents

Bus controller and related methods

Time synchronization for clocks separated by a communication link

Low power PCIe

Extended message signaled interrupts (MSI) message data

Time synchronization for clocks separated by a communication link

Alternate acknowledgment (ACK) signals in a coalescing transmission...

Replacement physical layer (PHY) for low-speed peripheral component...

Inline cryptographic engine (ICE) for peripheral component intercon...

Communicating transaction-specific attributes in a peripheral compo...

Hardware-based translation lookaside buffer (TLB) invalidation

Hardware-based packet processing circuitry

Placement driven routing

Device, system, and method of handling delayed transactions

Device, system, and method of handling transactions

Method of optimizing buffer usage of virtual channels of a physical...

Fast path memory read request processing in a multi-level memory ar...

Method for dynamic management of TCP reassembly buffers

Patents Applicationslast 30 patents

TIME SYNCHRONIZATION FOR CLOCKS SEPARATED BY A COMMUNICATION LINK

EXTENDED MESSAGE SIGNALED INTERRUPTS (MSI) MESSAGE DATA

REDUCING LATENCY ON LONG DISTANCE POINT-TO-POINT LINKS

TIME SYNCHRONIZATION FOR CLOCKS SEPARATED BY A COMMUNICATION LINK

SPLIT READ TRANSACTIONS OVER AN AUDIO COMMUNICATION BUS

BUS CONTROLLER AND RELATED METHODS

LOW POWER PCIE

ALTERNATE ACKNOWLEDGMENT (ACK) SIGNALS IN A COALESCING TRANSMISSION...

REPLACEMENT PHYSICAL LAYER (PHY) FOR LOW-SPEED PERIPHERAL COMPONENT...

HARDWARE-BASED PACKET PROCESSING CIRCUITRY

VIRTUALIZED INTERNET PROTOCOL (IP) PACKET PROCESSING SYSTEM

HARDWARE-BASED TRANSLATION LOOKASIDE BUFFER (TLB) INVALIDATION

INLINE CRYPTOGRAPHIC ENGINE (ICE) FOR PERIPHERAL COMPONENT INTERCON...

EXTENDED MESSAGE SIGNALED INTERRUPTS (MSI) MESSAGE DATA

COMMUNICATING TRANSACTION-SPECIFIC ATTRIBUTES IN A PERIPHERAL COMPO...

COHERENCY DRIVEN ENHANCEMENTS TO A PERIPHERAL COMPONENT INTERCONNEC...

HEAD-OF-LINE BLOCKING (HOLB) MITIGATION IN COMMUNICATION DEVICES

DYNAMIC INDEX SELECTION IN A HARDWARE CACHE

Secondary Cache Memory With A Counter For Determining Whether to Re...

AUTOMATED ADVANCE LINK ACTIVATION

ADAPTIVE LINK WIDTH CONTROL

PLACEMENT DRIVEN ROUTING

Device, System, and Method of Handling Transactions

Device, System, and Method of Handling Delayed Transactions

Method Circuit and System for Data Flow Control

Fast path memory read request processing in a multi-level memory ar...

Method of offloading iSCSI TCP/IP processing from a host processing...

Dynamic management of TCP reassembly buffers