Sherif Sweha

Person

El Dorado Hills, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Bit map addressing schemes for flash memory
- Patent number 6,483,742
- Issue date Nov 19, 2002
- Intel Corporation
- Sherif Sweha
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuitry for usage of partially functional nonvolatile...
- Patent number 5,822,256
- Issue date Oct 13, 1998
- Intel Corporation
- Mark E. Bauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit map addressing schemes for flash memory
- Patent number 5,815,443
- Issue date Sep 29, 1998
- Intel Corporation
- Sherif Sweha
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit map addressing schemes for flash memory
- Patent number 5,796,667
- Issue date Aug 18, 1998
- Intel Corporation
- Sherif Sweha
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit map addressing schemes for flash/memory
- Patent number 5,781,472
- Issue date Jul 14, 1998
- Intel Corporation
- Sherif Sweha
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory blocking architecture
- Patent number 5,663,923
- Issue date Sep 2, 1997
- Intel Corporation
- Robert L. Baltar
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit map addressing schemes for flash memory
- Patent number 5,497,354
- Issue date Mar 5, 1996
- Intel Corporation
- Sherif Sweha
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory with blocked redundant columns and corresponding...
- Patent number 5,347,484
- Issue date Sep 13, 1994
- Intel Corporation
- Phillip M. Kwong
- G11 - INFORMATION STORAGE
Information Patent Grant
Floating gate nonvolatile memory with configurable erasure blocks
- Patent number 5,280,447
- Issue date Jan 18, 1994
- Intel Corporation
- Peter K. Hazen
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed tri-level decoder with dual-voltage isolation
- Patent number 5,274,278
- Issue date Dec 28, 1993
- Intel Corporation
- Mark E. Bauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Floating gate nonvolatile memory with distributed blocking feature
- Patent number 5,267,196
- Issue date Nov 30, 1993
- Intel Corporation
- Sanjay S. Talreja
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having selectable number of output pins
- Patent number 5,262,990
- Issue date Nov 16, 1993
- Intel Corporation
- Duane F. Mills
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Information Patent Grant
Apparatus for increasing the speed of operation of non-volatile mem...
- Patent number 5,245,574
- Issue date Sep 14, 1993
- Intel Corporation
- Kevin W. Frary
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy CAM using word line from memory
- Patent number 5,046,046
- Issue date Sep 3, 1991
- Intel Corporation
- Sherif Sweha
- G11 - INFORMATION STORAGE

Sherif Sweha

Person

Patents Grantslast 30 patents

Bit map addressing schemes for flash memory

Method and circuitry for usage of partially functional nonvolatile...

Bit map addressing schemes for flash memory

Bit map addressing schemes for flash memory

Bit map addressing schemes for flash/memory

Nonvolatile memory blocking architecture

Bit map addressing schemes for flash memory

Nonvolatile memory with blocked redundant columns and corresponding...

Floating gate nonvolatile memory with configurable erasure blocks

High-speed tri-level decoder with dual-voltage isolation

Floating gate nonvolatile memory with distributed blocking feature

Memory device having selectable number of output pins

Apparatus for increasing the speed of operation of non-volatile mem...

Redundancy CAM using word line from memory