Shih-Hsiung Stephen Tung

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Operation of a multi-slice processor implementing a unified page wa...
- Patent number 11,157,415
- Issue date Oct 26, 2021
- International Business Machines Corporation
- Dwain A. Hicks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hazard detection of out-of-order execution of load and store instru...
- Patent number 10,977,047
- Issue date Apr 13, 2021
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing exception handlin...
- Patent number 10,824,494
- Issue date Nov 3, 2020
- International Business Machines Corporation
- Dwain A. Hicks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speeding up younger store instruction execution after a sync instru...
- Patent number 10,664,275
- Issue date May 26, 2020
- International Business Machines Corporation
- Susan E. Eisen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing a unified page wa...
- Patent number 10,534,715
- Issue date Jan 14, 2020
- International Business Machines Corporation
- Dwain A. Hicks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hazard detection of out-of-order execution of load and store instru...
- Patent number 10,417,002
- Issue date Sep 17, 2019
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address translation for sending real address to memory subsystem in...
- Patent number 10,324,856
- Issue date Jun 18, 2019
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flush avoidance in a load store unit
- Patent number 10,318,419
- Issue date Jun 11, 2019
- International Business Machines Corporation
- Sundeep Chadha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address translation for sending real address to memory subsystem in...
- Patent number 10,310,988
- Issue date Jun 4, 2019
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speeding up younger store instruction execution after a sync instru...
- Patent number 10,067,765
- Issue date Sep 4, 2018
- International Business Machines Corporation
- Susan E. Eisen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing exception handlin...
- Patent number 10,042,691
- Issue date Aug 7, 2018
- International Business Machines Corporation
- Dwain A. Hicks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detection of conflicts between transactions and page shootdowns
- Patent number 9,086,987
- Issue date Jul 21, 2015
- International Business Machines Corporation
- Harold W. Cain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detection of conflicts between transactions and page shootdowns
- Patent number 9,086,986
- Issue date Jul 21, 2015
- International Business Machines Corporation
- Harold W. Cain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Loading data to vector renamed register from across multiple cache...
- Patent number 8,086,801
- Issue date Dec 27, 2011
- International Business Machines Corporation
- David A. Hrusecky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for avoiding check stops in speculative accesses while op...
- Patent number 7,949,859
- Issue date May 24, 2011
- International Business Machines Corporation
- Ronald N. Kalla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for avoiding check stops in speculative accesses while op...
- Patent number 7,370,177
- Issue date May 6, 2008
- International Business Machines Corporation
- Ronald N. Kalla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced STCX design to improve subsequent load efficiency
- Patent number 7,254,678
- Issue date Aug 7, 2007
- International Business Machines Corporation
- Gregory William Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to arbitrate for a cache block
- Patent number 6,463,514
- Issue date Oct 8, 2002
- International Business Machines Corporation
- David Scott Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient store machine in cache based microprocessor
- Patent number 6,446,170
- Issue date Sep 3, 2002
- International Business Machines Corporation
- Kin Shing Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor and method of prefetching data based upon a detected stride
- Patent number 6,430,680
- Issue date Aug 6, 2002
- International Business Machines Corporation
- William Elton Burky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Token mechanism for cache-line replacement within a cache memory ha...
- Patent number 6,304,939
- Issue date Oct 16, 2001
- International Business Machines Corporation
- Peichun Peter Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined cache memory deallocation and storeback
- Patent number 6,298,417
- Issue date Oct 2, 2001
- International Business Machines Corporation
- Kin Shing Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Obtaining load target operand pre-fetch address from history table...
- Patent number 6,275,918
- Issue date Aug 14, 2001
- International Business Machines Corporation
- William Elton Burky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated cache buffers
- Patent number 6,240,487
- Issue date May 29, 2001
- International Business Machines Corporation
- Pei-Chun Peter Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for pre-fetch cache interrogation using snoop port
- Patent number 6,202,128
- Issue date Mar 13, 2001
- International Business Machines Corporation
- Kin Shing Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for tracking out of order load instructions to...
- Patent number 6,148,394
- Issue date Nov 14, 2000
- International Business Machines Corporation
- Shih-Hsiung Stephen Tung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for processing misaligned load instructions in...
- Patent number 6,112,297
- Issue date Aug 29, 2000
- International Business Machines Corporation
- David Scott Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache error retry technique
- Patent number 6,108,753
- Issue date Aug 22, 2000
- International Business Machines Corporation
- Douglas Craig Bossen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for selectively controlling fetching and prefetch...
- Patent number 6,085,291
- Issue date Jul 4, 2000
- International Business Machines Corporation
- Dwain Alan Hicks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Token mechanism for cache-line replacement within a cache memory ha...
- Patent number 6,041,390
- Issue date Mar 21, 2000
- International Business Machines Corporation
- Peichun Peter Liu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING A UNIFIED PAGE WA...
- Publication number 20200125496
- Publication date Apr 23, 2020
- International Business Machines Corporation
- DWAIN A. HICKS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HAZARD DETECTION OF OUT-OF-ORDER EXECUTION OF LOAD AND STORE INSTRU...
- Publication number 20190310858
- Publication date Oct 10, 2019
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDRESS TRANSLATION FOR SENDING REAL ADDRESS TO MEMORY SUBSYSTEM IN...
- Publication number 20190108132
- Publication date Apr 11, 2019
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDRESS TRANSLATION FOR SENDING REAL ADDRESS TO MEMORY SUBSYSTEM IN...
- Publication number 20190108133
- Publication date Apr 11, 2019
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HAZARD DETECTION OF OUT-OF-ORDER EXECUTION OF LOAD AND STORE INSTRU...
- Publication number 20190108034
- Publication date Apr 11, 2019
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Speeding Up Younger Store Instruction Execution After a Sync Instru...
- Publication number 20190012175
- Publication date Jan 10, 2019
- International Business Machines Corporation
- Susan E. Eisen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING EXCEPTION HANDLIN...
- Publication number 20180293126
- Publication date Oct 11, 2018
- International Business Machines Corporation
- DWAIN A. HICKS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLUSH AVOIDANCE IN A LOAD STORE UNIT
- Publication number 20180039577
- Publication date Feb 8, 2018
- International Business Machines Corporation
- SUNDEEP CHADHA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING A UNIFIED PAGE WA...
- Publication number 20170308474
- Publication date Oct 26, 2017
- International Business Machines Corporation
- DWAIN A. HICKS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING EXCEPTION HANDLIN...
- Publication number 20170308425
- Publication date Oct 26, 2017
- International Business Machines Corporation
- DWAIN A. HICKS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTION OF CONFLICTS BETWEEN TRANSACTIONS AND PAGE SHOOTDOWNS
- Publication number 20140115297
- Publication date Apr 24, 2014
- International Business Machines Corporation
- Harold W. Cain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTION OF CONFLICTS BETWEEN TRANSACTIONS AND PAGE SHOOTDOWNS
- Publication number 20140075151
- Publication date Mar 13, 2014
- International Business Machines Corporation
- Harold W. Cain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Speeding Up Younger Store Instruction Execution after a Sync Instru...
- Publication number 20130305022
- Publication date Nov 14, 2013
- International Business Machines Corporation
- Susan E. Eisen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Loading Data to Vector Renamed Register From Across Multiple Cache...
- Publication number 20100262781
- Publication date Oct 14, 2010
- International Business Machines Corporation
- David A. Hrusecky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanism for Avoiding Check Stops in Speculative Accesses While Op...
- Publication number 20090193233
- Publication date Jul 30, 2009
- International Business Machines Corporation
- Ronald N. Kalla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced STCX design to improve subsequent load efficiency
- Publication number 20060212653
- Publication date Sep 21, 2006
- Gregory William Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanism for avoiding check stops in speculative accesses while op...
- Publication number 20040216001
- Publication date Oct 28, 2004
- International Business Machines Corporation
- Ronald N. Kalla
- G06 - COMPUTING CALCULATING COUNTING

Shih-Hsiung Stephen Tung

Person

Patents Grantslast 30 patents

Operation of a multi-slice processor implementing a unified page wa...

Hazard detection of out-of-order execution of load and store instru...

Operation of a multi-slice processor implementing exception handlin...

Speeding up younger store instruction execution after a sync instru...

Operation of a multi-slice processor implementing a unified page wa...

Hazard detection of out-of-order execution of load and store instru...

Address translation for sending real address to memory subsystem in...

Flush avoidance in a load store unit

Address translation for sending real address to memory subsystem in...

Speeding up younger store instruction execution after a sync instru...

Operation of a multi-slice processor implementing exception handlin...

Detection of conflicts between transactions and page shootdowns

Detection of conflicts between transactions and page shootdowns

Loading data to vector renamed register from across multiple cache...

Mechanism for avoiding check stops in speculative accesses while op...

Mechanism for avoiding check stops in speculative accesses while op...

Enhanced STCX design to improve subsequent load efficiency

Method to arbitrate for a cache block

Efficient store machine in cache based microprocessor

Processor and method of prefetching data based upon a detected stride

Token mechanism for cache-line replacement within a cache memory ha...

Pipelined cache memory deallocation and storeback

Obtaining load target operand pre-fetch address from history table...

Integrated cache buffers

Method and system for pre-fetch cache interrogation using snoop port

Apparatus and method for tracking out of order load instructions to...

Apparatus and method for processing misaligned load instructions in...

Cache error retry technique

System and method for selectively controlling fetching and prefetch...

Token mechanism for cache-line replacement within a cache memory ha...

Patents Applicationslast 30 patents

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING A UNIFIED PAGE WA...

HAZARD DETECTION OF OUT-OF-ORDER EXECUTION OF LOAD AND STORE INSTRU...

ADDRESS TRANSLATION FOR SENDING REAL ADDRESS TO MEMORY SUBSYSTEM IN...

ADDRESS TRANSLATION FOR SENDING REAL ADDRESS TO MEMORY SUBSYSTEM IN...

HAZARD DETECTION OF OUT-OF-ORDER EXECUTION OF LOAD AND STORE INSTRU...

Speeding Up Younger Store Instruction Execution After a Sync Instru...

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING EXCEPTION HANDLIN...

FLUSH AVOIDANCE IN A LOAD STORE UNIT

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING A UNIFIED PAGE WA...

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING EXCEPTION HANDLIN...

DETECTION OF CONFLICTS BETWEEN TRANSACTIONS AND PAGE SHOOTDOWNS

DETECTION OF CONFLICTS BETWEEN TRANSACTIONS AND PAGE SHOOTDOWNS

Speeding Up Younger Store Instruction Execution after a Sync Instru...

Loading Data to Vector Renamed Register From Across Multiple Cache...

Mechanism for Avoiding Check Stops in Speculative Accesses While Op...

Enhanced STCX design to improve subsequent load efficiency

Mechanism for avoiding check stops in speculative accesses while op...