Shing-Hwa Renn

Person

Taipei County, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Dual vertical channel transistor and fabrication method thereof
- Patent number 8,653,584
- Issue date Feb 18, 2014
- Nanya Technology Corp.
- Shing-Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitor formation for a pumping circuit
- Patent number 8,587,047
- Issue date Nov 19, 2013
- Nanya Technology Corp.
- Yu-Wei Ting
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for aligning wafer stack
- Patent number 8,420,411
- Issue date Apr 16, 2013
- Nanya Technology Corp.
- Shing-Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolation structure and device structure including the same
- Patent number 8,299,562
- Issue date Oct 30, 2012
- Nanya Technology Corporation
- Chung-Ren Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit device and method of forming the same
- Patent number 8,227,840
- Issue date Jul 24, 2012
- Nanya Technology Corp.
- Charles C. Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical alignment mark set and method for aligning wafer stack
- Patent number 8,102,064
- Issue date Jan 24, 2012
- Nanya Technology Corp.
- Shing-Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flash memory cell and method for operating the same
- Patent number 8,077,512
- Issue date Dec 13, 2011
- Nanya Technology Corp.
- Shing Hwa Renn
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 8,063,404
- Issue date Nov 22, 2011
- Nanya Technology Corp.
- Shing-Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
DRAM device having a gate dielectric layer with multiple thicknesses
- Patent number 7,948,028
- Issue date May 24, 2011
- Nanya Technology Corp.
- Shing-Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded bit line structure, field effect transistor structure with...
- Patent number 7,948,027
- Issue date May 24, 2011
- Nanya Technology Corp.
- Shing-Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a split-gate flash memory
- Patent number 6,200,859
- Issue date Mar 13, 2001
- Winbond Electronics Corp.
- Chih-Mu Huang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ISOLATION STRUCTURE AND DEVICE STRUCTURE INCLUDING THE SAME
- Publication number 20120248518
- Publication date Oct 4, 2012
- NANYA TECHNOLOGY CORPORATION
- Chung-Ren Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICE AND METHOD OF FORMING THE SAME
- Publication number 20120126412
- Publication date May 24, 2012
- NANYA TECHNOLOGY CORP
- Charles C. Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR ALIGNING WAFER STACK
- Publication number 20120083053
- Publication date Apr 5, 2012
- Shing-Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE WITH THROUGH VIA FOR HEAT EVACUATING
- Publication number 20120032339
- Publication date Feb 9, 2012
- NANYA TECHNOLOGY CORPORATION
- Shing Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGLE-GATE FINFET AND FABRICATION METHOD THEREOF
- Publication number 20110298041
- Publication date Dec 8, 2011
- Shing-Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH-SUBSTRATE VIA AND FABRICATION METHOD THEREOF
- Publication number 20110260297
- Publication date Oct 27, 2011
- Shian-Jyh Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICAL ALIGNMENT MARK SET AND METHOD FOR ALIGNING WAFER STACK
- Publication number 20110250710
- Publication date Oct 13, 2011
- Shing-Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20110241105
- Publication date Oct 6, 2011
- Shing-Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL VERTICAL CHANNEL TRANSISTOR AND FABRICATION METHOD THEREOF
- Publication number 20110227145
- Publication date Sep 22, 2011
- Shing-Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED BIT LINE STRUCTURE, FIELD EFFECT TRANSISTOR STRUCTURE WITH...
- Publication number 20110140196
- Publication date Jun 16, 2011
- Shing-Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE AND MEMORY ARRAY
- Publication number 20110042722
- Publication date Feb 24, 2011
- NANYA TECHNOLOGY CORP
- Shing Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLASH MEMORY CELL AND METHOD FOR OPERATING THE SAME
- Publication number 20110044100
- Publication date Feb 24, 2011
- NANYA TECHNOLOGY CORP
- Shing Hwa Renn
- G11 - INFORMATION STORAGE
Information Patent Application
CAPACITOR FORMATION FOR A PUMPING CIRCUIT
- Publication number 20090189251
- Publication date Jul 30, 2009
- Yu-Wei Ting
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRAM DEVICE HAVING A GATE DIELECTRIC LAYER WITH MULTIPLE THICKNESSES
- Publication number 20090114966
- Publication date May 7, 2009
- Shing-Hwa Renn
- H01 - BASIC ELECTRIC ELEMENTS

Shing-Hwa Renn

Person

Patents Grantslast 30 patents

Dual vertical channel transistor and fabrication method thereof

Capacitor formation for a pumping circuit

Method for aligning wafer stack

Isolation structure and device structure including the same

Integrated circuit device and method of forming the same

Electrical alignment mark set and method for aligning wafer stack

Flash memory cell and method for operating the same

Semiconductor memory device

DRAM device having a gate dielectric layer with multiple thicknesses

Embedded bit line structure, field effect transistor structure with...

Method of fabricating a split-gate flash memory

Patents Applicationslast 30 patents

ISOLATION STRUCTURE AND DEVICE STRUCTURE INCLUDING THE SAME

INTEGRATED CIRCUIT DEVICE AND METHOD OF FORMING THE SAME

METHOD FOR ALIGNING WAFER STACK

INTEGRATED CIRCUIT STRUCTURE WITH THROUGH VIA FOR HEAT EVACUATING

SINGLE-GATE FINFET AND FABRICATION METHOD THEREOF

THROUGH-SUBSTRATE VIA AND FABRICATION METHOD THEREOF

ELECTRICAL ALIGNMENT MARK SET AND METHOD FOR ALIGNING WAFER STACK

SEMICONDUCTOR MEMORY DEVICE

DUAL VERTICAL CHANNEL TRANSISTOR AND FABRICATION METHOD THEREOF

EMBEDDED BIT LINE STRUCTURE, FIELD EFFECT TRANSISTOR STRUCTURE WITH...

INTEGRATED CIRCUIT STRUCTURE AND MEMORY ARRAY

FLASH MEMORY CELL AND METHOD FOR OPERATING THE SAME

CAPACITOR FORMATION FOR A PUMPING CIRCUIT

DRAM DEVICE HAVING A GATE DIELECTRIC LAYER WITH MULTIPLE THICKNESSES