Shogo Shibazaki

Person

Kawasaki, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Memory test method and memory test device
- Patent number 8,503,259
- Issue date Aug 6, 2013
- Fujitsu Limited
- Shogo Shibazaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Test apparatus, test method, and integrated circuit
- Patent number 8,143,901
- Issue date Mar 27, 2012
- Fujitsu Limited
- Chikahiro Deguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Encryption device
- Patent number 7,689,836
- Issue date Mar 30, 2010
- Fujitsu Microelectronics Limited
- Takeshi Nagase
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of writing, erasing, and controlling memory for memory device
- Patent number 7,257,666
- Issue date Aug 14, 2007
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage device having secure test process
- Patent number 7,076,667
- Issue date Jul 11, 2006
- Fujitsu Limited
- Shinkichi Gama
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of writing, erasing, and controlling memory for memory device
- Patent number 6,766,409
- Issue date Jul 20, 2004
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory management table producing method and memory device
- Patent number 6,625,712
- Issue date Sep 23, 2003
- Fujitsu Limited
- Shogo Shibazaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of writing, erasing, and controlling memory for memory device
- Patent number 6,584,579
- Issue date Jun 24, 2003
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of writing, erasing, and controlling memory for memory device
- Patent number 6,161,163
- Issue date Dec 12, 2000
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of writing, erasing, and controlling memory and memory devic...
- Patent number 6,125,424
- Issue date Sep 26, 2000
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock switch circuit
- Patent number 6,118,312
- Issue date Sep 12, 2000
- Fujitsu Limited
- Shogo Shibazaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simultaneously writing to and erasing two commonly numbered sectors
- Patent number 5,983,312
- Issue date Nov 9, 1999
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Bus control apparatus for data transfer system
- Patent number 5,809,257
- Issue date Sep 15, 1998
- Fujitsu Limited
- Shogo Shibazaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for controlling the writing and erasing of inf...
- Patent number 5,802,551
- Issue date Sep 1, 1998
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Test apparatus, test method, and integrated circuit
- Publication number 20090300443
- Publication date Dec 3, 2009
- FUJITSU LIMITED
- Chikahiro Deguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Memory test method and memory test device
- Publication number 20090296505
- Publication date Dec 3, 2009
- FUJITSU LIMITED
- Shogo Shibazaki
- G11 - INFORMATION STORAGE
Information Patent Application
Encryption device
- Publication number 20070165864
- Publication date Jul 19, 2007
- FUJITSU LIMITED
- Takeshi Nagase
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of writing, erasing, and controlling memory for memory device
- Publication number 20030196029
- Publication date Oct 16, 2003
- FUJITSU LIMITED
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Application
Memory management table producing method and memory device
- Publication number 20010014933
- Publication date Aug 16, 2001
- Shogo Shibazaki
- G06 - COMPUTING CALCULATING COUNTING

Shogo Shibazaki

Person

Patents Grantslast 30 patents

Memory test method and memory test device

Test apparatus, test method, and integrated circuit

Encryption device

Method of writing, erasing, and controlling memory for memory device

Storage device having secure test process

Method of writing, erasing, and controlling memory for memory device

Memory management table producing method and memory device

Method of writing, erasing, and controlling memory for memory device

Method of writing, erasing, and controlling memory for memory device

Method of writing, erasing, and controlling memory and memory devic...

Clock switch circuit

Simultaneously writing to and erasing two commonly numbered sectors

Bus control apparatus for data transfer system

Method and apparatus for controlling the writing and erasing of inf...

Patents Applicationslast 30 patents

Test apparatus, test method, and integrated circuit

Memory test method and memory test device

Encryption device

Method of writing, erasing, and controlling memory for memory device

Memory management table producing method and memory device